Method and apparatus for gate blocking X-outs during a molding process

• US 20030088976A1
• Filed: 12/24/2002
• Published: 05/15/2003
• Est. Priority Date: 04/19/2000
• Status: Abandoned Application

• Current Assignee: Bret K. Street, Cary Baerlocher, Casey L. Prindiville
• Original Assignee: Bret K. Street, Cary Baerlocher, Casey L. Prindiville
• Inventors: Street, Bret K., Prindiville, Casey L., Baerlocher, Cary
• Application Number:
  US10/328,476
• Publication Number:
  US 20030088976A1
• Time in Patent Office: Days
• US Class Current: 29/832
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/49121 Beam lead frame or beam lead device
• CPC Class Codes: Y10T 29/49128 Assembling formed circuit to base
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49146 with encapsulating, e.g., potting, etc.
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths
• CPC Class Codes: Y10T 29/49169 Assembling electrical component directly to terminal or elongated conductor
• CPC Class Codes: Y10T 29/49171 with encapsulating
• CPC Class Codes: Y10T 29/49172 by molding of insulating material
• CPC Class Codes: Y10T 29/5137 including assembling or disassembling station
• CPC Class Codes: Y10T 29/53178 Chip component

Abstract

A method and device for providing a gate blocking material. Specifically, a method for molding a substrate having known good and bad sites thereon, by blocking the gate area of the bad sites during the molding process. A blocking material or an injection pin are used to interrupt the flow of molding compound through an injection molding system, and thereby prevent molding compound from flowing onto the known bad substrate sites.

Claims

1. A method of molding a substrate comprising the acts of:

(a) providing a substrate having a plurality of sites, each site having a gate area and being configured to receive an integrated circuit device;

(b) testing the substrate to identify bad sites;

(c) disposing a material on the gate area of each bad site;

(d) disposing an integrated circuit device on each good site;

(e) disposing the substrate onto a molding apparatus;

(f) injecting a molding compound through a runner in the molding apparatus; and

(g) disposing the molding compound on only the good sites.

2. The method, as set forth in claim 1, wherein act (a) comprises providing a board-on-chip substrate.

3. The method, as set forth in claim 1, wherein act (a) comprises providing a chip-on-board substrate.

4. The method, as set forth in claim 1, wherein act (a) comprises providing a flip chip substrate.

5. The method, as set forth in claim 1, wherein act (d) comprises disposing a memory device on each good site.

6. The method, as set forth in claim 1, wherein act (c) comprises disposing an adhesive tape on the gate area.

7. The method, as set forth in claim 1, wherein act (c) comprises inserting a blocking pin in the gate area.

8. The method, as set forth in claim 1, wherein act (f) comprises injecting a resin through a runner in the molding apparatus.

9. A method of molding a substrate comprising the acts of:

(a) providing a substrate having a plurality of sites, each site having a gate area and being configured to receive an integrated circuit device;

(b) testing the substrate to identify bad sites;

(c) disposing an integrated circuit device on each good site;

(d) disposing the substrate onto a molding apparatus;

(e) inserting blocking pins on the gate area of each bad site;

(f) injecting a molding compound through a runner in the molding apparatus; and

(g) disposing the molding compound on only the good sites.

10. The method, as set forth in claim 9, wherein act (a) comprises providing a board-on-chip substrate.

11. The method, as set forth in claim 9, wherein act (a) comprises providing a chip-on-board substrate.

12. The method, as set forth in claim 9, wherein act (a) comprises providing a flip-chip substrate.

13. The method, as set forth in claim 9, wherein act (c) comprises disposing a memory device on each good site.

14. The method, as set forth in claim 9, wherein act (e) further comprises ejecting blocking pins from the molding apparatus and inserting the blocking pins on the gate area of each bad site.

15. A method of manufacturing a package comprising the acts of:

(a) providing a substrate having a die site and a gate area; and

(b) disposing a material on the gate area to block mold compound from entering the die site.

16. The method, as set forth in claim 15, wherein act (a) comprises providing a board-on-chip substrate.

17. The method, as set forth in claim 15, wherein act (a) comprises providing a chip-on-boardsubstrate.

18. The method, as set forth in claim 15, wherein act (a) comprises providing a flip-chip substrate.

19. The method, as set forth in claim 15, wherein act (b) comprises disposing a strip of adhesive tape onto the gate area.

20. The method, as set forth in claim 15, wherein act (b) comprises disposing a blocking pin in the gate area.

21. A substrate comprising:

at least one die site having a gate area; and

a material disposed onto the gate area to block mold compound from entering the die site.

22. The substrate, as set forth in claim 21, wherein the substrate comprises a board-on-chip substrate.

23. The substrate, as set forth in claim 21, wherein the substrate comprises a chip-on-board substrate.

24. The substrate, as set forth in claim 21, wherein the substrate comprises a flip-chip substrate.

25. The substrate, as set forth in claim 21, wherein the material comprises an adhesive tape.

26. The substrate, as set forth in claim 21, wherein the material comprises a blocking pin.

27. A molding system comprising:

a first plate;

a second plate adapted to be disposed proximate to the first plate to create a runner having a gate area; and

at least one blocking pin coupled to one of the first plate and the second plate, the blocking pin being moveable to block a molding compound from passing through the gate area.

28. The system, as set forth in claim 27, further comprising a substrate disposed between the first plate and the second plate.

29. The system, as set forth in claim 27, wherein the blocking pin is manually moved to block a molding compound from passing through the gate area.

30. The system, as set forth in claim 27, wherein the blocking pin is mechanically moved by a solenoid to block a molding compound from passing through the gate area.

31. The system, as set forth in claim 27, wherein the blocking pin is positioned to block the runner.

32. The system, as set forth in claim 27, wherein the blocking pin is positioned to block the gate area.

33. A plurality of at least one package comprising:

a substrate having at least one good site and at least one bad site;

an integrated circuit devices disposed only on each good site; and

a molding compound disposed only on each good site.

34. The package, as set forth in claim 33, wherein the substrate comprises a board-on-chip substrate.

35. The package, as set forth in claim 33, wherein the substrate comprises a chip-on-board substrate.

36. The package, as set forth in claim 33, wherein the substrate comprises a flip-chip substrate.

37. The package, as set forth in claim 33, wherein the integrated circuit device comprises a memory device.