Calibration device and method for generating a clock in an integrated circuit

• US 20030095008A1
• Filed: 12/16/2002
• Published: 05/22/2003
• Est. Priority Date: 06/15/2000
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Kranz, Christian
• Granted Patent: US 6,885,254 B2
• Time in Patent Office: Days
• US Class Current: 331/18
• CPC Class Codes: H03L 1/00 Stabilisation of generator output against variations of physical values, e.g. power supply
• CPC Class Codes: H03L 7/00 Automatic control of frequency or phase; Synchronisation

Abstract

To generate an accurate frequency standard in an integrated circuit, it is proposed to activate a reference oscillator at certain time intervals and to calibrate the local oscillator. For this purpose, a calibration circuit is provided, which determines the clock ratio between the internal clock and the reference clock. The clock ratio determined is used for programming a frequency divider. The calibration circuit is particularly suitable for being used in mobile radio devices.

Claims

1. A calibration device for generating a clock in an integrated circuit, comprising:

a device for generating clock signals disposed in the integrated circuit, said device generating both an internal clock and a target clock;

a reference oscillator having selectably an active state and a passive state, said reference oscillator supplying a reference clock in the active state; and

a calibration circuit connected to said device and said reference oscillator and receiving the internal clock and the reference clock, said calibration circuit determining a clock ratio between the internal clock and the reference clock;

said device for generating clock signals having means for influencing the target clock in dependence on the clock ratio determined by said calibration circuit, said means for influencing the target clock coupled to said calibration circuit.

2. The calibration device according to claim 1, wherein said device for generating clock signals contains a local oscillator disposed in the integrated circuit, said local oscillator generating both the internal clock and the target clock, the internal clock being identical to the target clock.

3. The calibration device according to claim 1, wherein said device for generating the clock signals contains:

a local oscillator disposed in the integrated circuit and generating the internal clock; and

a frequency divider disposed in the integrated circuit and connected to said local oscillator, said frequency divider converting the internal clock into the target clock.

4. The calibration device according to claim 3, wherein said means for influencing the target clock is implemented at least partially by said frequency divider being a programmable frequency divider, the target clock output being adjustable in dependence on the clock ratio determined by said calibration circuit.

5. The calibration device according to claim 4, wherein said programmable frequency divider is a digital fractional divider.

6. The calibration device according to claim 2, wherein said means for influencing the target clock is implemented at least partially in that said local oscillator is a tunable local oscillator, the target clock being adjustable by varying at least one of resistors, capacitors, control voltages, and control currents in dependence on the clock ratio determined by said calibration circuit.

7. The calibration device according to claim 1, wherein said reference oscillator changes from the passive state into the active state and conversely from the active state back into the passive state at periodic intervals.

8. The calibration device according to claim 7, further comprising an external timer for controlling a transition of said reference oscillator from the passive state into the active state and conversely from the active state back into the passive state.

9. The calibration device according to claim 7, wherein the target clock is used for controlling a transition of said reference oscillator from the passive state into the active state and conversely from the active state back into the passive state.

10. The calibration device according to claim 1, wherein a transition of said reference oscillator from the passive state into the active state and conversely from the active state back into the passive state is synchronized with the switching-on and switching-off of the complete system.

11. The calibration device according to claim 1, wherein during periods in which said reference oscillator is in the active state, the reference clock is used instead of the internal clock for generating the target clock.

12. The calibration device according to claim 11, wherein a transition of said reference oscillator from the passive state into the active state is initiated by an external interference signal.

13. The calibration device according to claim 1, wherein said reference oscillator is a crystal oscillator.

14. The calibration device according to claim 1, wherein said calibration circuit repeatedly determines the clock ratio between the internal clock and the reference clock until a result remains essentially unchanged.

15. A device for transmitting and receiving data, comprising:

a calibration device, containing;

a device for generating clock signals disposed in the integrated circuit, said device generating both an internal clock and a target clock;

a reference oscillator having selectably an active state and a passive state, said reference oscillator supplying a reference clock in the active state; and

a calibration circuit connected to said device and said reference oscillator and receiving the internal clock and the reference clock, said calibration circuit determining a clock ratio between the internal clock and the reference clock;

said device for generating clock signals having means for influencing the target clock in dependence on the clock ratio determined by said calibration circuit, said means for influencing the target clock coupled to said calibration circuit.

16. A calibration method for generating a clock in an integrated circuit, the integrated circuit containing a device for generating clock signals including an internal clock and a target clock, which method comprises the steps of:

changing a reference oscillator from a passive state into an active state, the reference oscillator supplying a reference clock to the integrated circuit in the active state;

determining a clock ratio between the internal clock and the reference clock; and

influencing the target clock in dependence on the clock ratio between the internal clock and the reference clock.

17. The calibration method according to claim 16, which comprises providing the device for generating clock signals with a local oscillator disposed in the integrated circuit, the local oscillator generating both the internal clock and the target clock, the internal clock being identical to the target clock.

18. The calibration method according to claim 16, which comprises providing the device for generating clock signals with a local oscillator disposed in the integrated circuit and generating the internal clock, and with a frequency divider disposed in the integrated circuit and converting the internal clock into the target clock.

19. The calibration method according to claim 18, which comprises forming the frequency divider as a programmable frequency divider and in that the target clock is influenced by programming the frequency divider.

20. The calibration method according to claim 17, which comprises forming the local oscillator as a tunable oscillator and in that the target clock is influenced by varying at least one of resistors, capacitors, control voltages, and control currents.