Methods and apparatus for generating multiple network streams from a large scale memory buffer

• US 20030095783A1
• Filed: 11/21/2001
• Published: 05/22/2003
• Est. Priority Date: 11/21/2001
• Status: Abandoned Application

• Current Assignee: Broadbus Technologies, Inc. (Lenovo Group Ltd.)
• Original Assignee: Broadbus Technologies, Inc. (Lenovo Group Ltd.)
• Inventors: Binder, Jeffrey, Scheffler, Robert
• Application Number:
  US09/990,093
• Publication Number:
  US 20030095783A1
• Time in Patent Office: Days
• US Class Current: 386/324
• CPC Class Codes: H04N 21/21815 comprising local storage units
• CPC Class Codes: H04N 21/232 Content retrieval operation locally within server, e.g. reading video streams from disk arrays storage management G06F3/0604; details of querying and searching of video data from a database G06F16/739
• CPC Class Codes: H04N 21/2389 Multiplex stream processing, e.g. multiplex stream encrypting

Abstract

Multiple output streams of video and/or audio data are simultaneously generated from a large scale memory buffer array and sent to one or more customer devices for playback. The data is sent over networks, which use one or more protocols for data communication. Thus, for each network, a transport protocol stack is generated. The transport protocol stack is generated in hardware, thus greatly improving the throughput, and increasing the number of streams that can be generated. A wide data bus and wide address bus can be utilized because the protocol stack is generated in hardware, so that higher throughput can be achieved from the large scale memory buffer array. A plurality of protocol stack generators can have access to the same block of memory, allowing many output streams to be generated from a single copy of content in the large scale memory buffer array.

Claims

1. Apparatus for generating multiple streams of video and/or audio

data comprising:

a large scale memory device;

means for storing said data in said large scale memory device; and

means for retrieving at least a portion of said data from said large scale memory device and generating multiple asynchronous streams of data, said retrieving means including;

(a) at least two stream server processors operatively connected to said large scale memory device;

(b) an interconnect allowing near simultaneous access to said data stored in said large scale memory device by said at least two stream server processors,

(c) said interconnect including a hardware based arbitrator operatively connected to said at least two stream server processors for controlling access to said large scale memory device so that said multiple unique streams of data may be generated by one or more of said at least two stream server processors from said large scale memory device; and

(d) means for generating protocols necessary for the transport of each unique stream across at least one network and for decoding said unique streams of data.

2. The apparatus of claim 1, wherein the data stored and retrieved from said large scale memory device includes audio with a predetermined relationship to said video.

3. The apparatus of claim 1, wherein said large scale memory device is comprised of random access memory.

4. The apparatus of claim 3, wherein said large scale memory device has a storage capacity of at least 65 gigabytes.

5. The apparatus of claim 3, wherein said large scale memory device has an address bus greater than 36 bits.

6. The apparatus of claim 3, wherein said audio and/or video data includes multiple unique pro grams.

7. The apparatus of claim 6, wherein said multiple streams of asynchronous streams of data are simultaneously generated from said multiple unique programs.

8. The apparatus of claim 7, including means for allowing said stream(s) to be generated upon a first block of an audio/video program being stored in said large scale memory, without having to wait for entire said program to be written to said large scale memory.

9. The apparatus of claim 3, including a module CPU for each of said at least two stream server processors, each of said module CPUs using a first bus that is separate from a second bus from which said data streams are retrieved.

10. The apparatus of claim 1, wherein said large scale memory device is composed of dual inline memory modules.

11. The apparatus of claim 1, wherein said large scale memory device is composed of DRAM.

12. The apparatus of claim 1, wherein said large scale memory device is composed of magnetic RAM.

13. The apparatus of claim 1, wherein said large scale memory device is composed of dual data rate RAM.

14. The apparatus of claim 1, wherein said large scale memory device is composed static RAM.

15. The apparatus of claim 1, wherein said large scale memory device is composed synchronous DRAM.

16. The apparatus of claim 1, wherein the protocol associated with said streams of data is generated in hardware.

17. The apparatus of claim 1, wherein said stream server processors are interconnected and shared across a backplane.

18. The apparatus of claim 1, wherein said retrieving and generating means includes means for responding to VCR type controls, said controls being handled by a separate CPU running software.

19. A method for generating multiple asynchronous streams of video and/or audio data, including the steps of:

(a) generating one or more video and/or audio program streams,

(b) transferring said program stream(s) to a large scale memory device,

(c) storing at least a portion of said program stream(s) in said memory device,

(d) establishing sessions in response to a request from one or more customer terminals to generate one or more program stream(s), said request being handled by a CPU that uses a first bus separate from a second over which program streams are transferred to said customer terminal, and

(e) using a separate hardware based processor for retrieving and generating one or more program streams for said customer terminal from one or more program streams stored in said large scale memory.

20. The method of claim 19, wherein said large scale memory device is comprised of random access memory.

21. The method of claim 19, further comprising the step of generating multiple program streams using multiple hardware based processors that simultaneously access said large scale memory device.

22. The method of claim 19, further comprising the step of generating a protocol stack associated with each of said data streams in said hardware based processor.