×

Hardware interlock mechanism using a watchdog timer

  • US 20030097587A1
  • Filed: 02/27/2002
  • Published: 05/22/2003
  • Est. Priority Date: 11/01/2001
  • Status: Abandoned Application
First Claim
Patent Images

1. An integrated circuit, comprising:

  • a first bus interface logic for coupling to a first external bus;

    a microcontroller configured to receive an input from a security device over a direct input different from the first external bus, wherein the microcontroller is further configured to receive a request and to query the security device over the direct input.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×