Bus system and bus interface for connection to a bus

• US 20030101308A1
• Filed: 09/24/2002
• Published: 05/29/2003
• Est. Priority Date: 09/27/2001
• Status: Active Grant

• Current Assignee: ST-Ericcson SA (Telefonaktiebolaget LM Ericsson)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Zhang, Zhenyu, Chang, Yeow Khai
• Granted Patent: US 7,058,747 B2
• Time in Patent Office: Days
• US Class Current: 710/305
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 13/426 using an embedded synchronisation, e.g. Firewire bus, Fibre Channel bus, SSA bus

Abstract

The invention relates to a bus system comprising a first station (202) and a second station (203, 204) coupled by a bus for transferring data and control signals. The bus is conceived to operate according to a protocol in which the first station (202) repeatedly sends requests to the second station (203, 204). The first station (202) comprises a processor (206), a bus interface (207), and a buffer (208) coupled to said interruptible processor and said bus interface, the processor (206) being operable to generate request properties for the requests to be sent by the first station (202). Furthermore, the processor (206) is operable to handle said data items. The buffer (208) is operable to store said request properties. The bus interface (207) is operable to generate said requests from said stored request properties and to repeatedly send said requests.

Claims

1. A bus system comprising a first station (202) and a second station (203, 204) coupled by a bus for transferring data and control signals, said bus being conceived to operate according to a protocol in which said first station (202) repeatedly sends requests to said second station (203, 204), characterized in that said first station (202) comprises a processor (206), a bus interface (207), and a buffer (208) coupled to said processor (206) and said bus interface (207), where

said processor (206) is operable to generate request properties for said requests and for handling said data items;

said buffer (208) is operable to store said request properties;

said bus interface (207) is operable to generate said requests from said stored request properties and to repeatedly send said requests.

2. A bus system as claimed in claim 1, characterized in that said request properties comprise a polling rate of said requests.

3. A bus system as claimed in claim 2, characterized in that said request properties also comprise a payload of said requests.

4. A bus system as claimed in claim 1, characterized in that said second station (203, 204) responds to said requests, that said processor (206) is an interruptible processor and that said bus interface (207) is operable for interrupting said processor (206) upon reception of selected responses of said second station (203, 204).

5. A bus system as claimed in claim 1, characterized in that said bus system is a USB system.

6. A bus interface comprising a connection for a bus (403) and an input for receiving request properties from a processor, characterized in that said bus interface comprises a buffer (411) operable to store said request properties and a controller (409) operable to generate requests out of the stored request properties and to repeatedly send said requests to the connection (403).

7. A bus interface as claimed in claim 6, characterized in that said request properties comprise a polling rate of said requests.

8. A bus interface as claimed in claim 7, characterized in that said request properties also comprise a payload of said requests.

9. A bus interface as claimed in claim 6, characterized in that said bus interface also comprises an interrupt output for sending an interrupt signal to an interruptible processor, and that said controller (409) is operable to receive responses from said connection and to interrupt said processor upon reception of selected responses by sending an interrupt signal to the interrupt output.

10. A bus interface as claimed in claim 6, characterized in that said bus interface is operable to operate as a USB interface.