Selectable complexity turbo coding system

• US 20030101407A1
• Filed: 11/09/2001
• Published: 05/29/2003
• Est. Priority Date: 11/09/2001
• Status: Abandoned Application

• Current Assignee: CUTE Limited
• Original Assignee: CUTE Limited
• Inventors: Amrani, Ofer, Ariel, Meir
• Application Number:
  US09/986,502
• Publication Number:
  US 20030101407A1
• Time in Patent Office: Days
• US Class Current: 714/774
• CPC Class Codes: H03M 13/00 Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes error detection or error correction for analogue/digital, digital/analogue or code conversion H03M1/00 – H03M11/00; specially adapted for digital computers G06F11/08; for information storage based on relative movement between record carrier and transducer G11B, e.g. G11B20/18; for static stores G11C
• CPC Class Codes: H03M 13/2903 Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
• CPC Class Codes: H03M 13/2957 Turbo codes and decoding
• CPC Class Codes: H03M 13/353 Adaptation to the channel
• CPC Class Codes: H03M 13/6508 Flexibility, adaptability, parametrability and configurability of the implementation
• CPC Class Codes: H04L 1/0009 by adapting the channel coding H04L1/1812 takes precedence
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0055 MAP-decoding
• CPC Class Codes: H04L 1/0059 Convolutional codes
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27

Abstract

A switchable-output encoder for encoding an input data sequence into an error protection encoded output sequence is switchable between two encoding modes. The encoder modes comprise a relatively complex mode suitable for a relatively high noise level channel and a relatively simple mode suitable for a relatively low noise level channel. A corresponding decoder is also discussed.

Claims

1. A switchable-output encoder for encoding an input data sequence to form an error protection encoded output sequence, wherein said encoder is switchable between two encoding modes, said modes comprising a relatively complex mode suitable for a relatively high noise level channel and a relatively simple mode suitable for a relatively low noise level channel, wherein said relatively complex mode comprises a turbo coding mode.

2. A switchable-output encoder according to claim 1, wherein said relatively simple mode comprises a degenerated version of said relatively complex mode.

3. A switchable-output encoder according to claim 1, wherein said relatively simple mode comprises a degenerated turbo coding mode.

4. A switchable-output encoder according to claim 1, wherein said relatively simple mode comprises a convolutional coding mode.

5. A switchable-output encoder according to claim 1, wherein, in said turbo coding mode, said output sequence comprises a multiplexed sequence containing at least three sub-sequences, said sub-sequences including a data sequence, a first coded sequence formable by encoding said data sequence, and a second coded sequence formable by interleaving said data sequence into an interleaved sequence and encoding said interleaved sequence.

6. A switchable-output encoder according to claim 3, wherein, in said degenerated turbo coding mode, said output sequence comprises a multiplexed sequence containing at least three sub-sequences, said sub-sequences including a data sequence, a first coded sequence formable by encoding said data sequence, and an interleaved sequence formable by interleaving said data sequence.

7. A switchable-output encoder according to claim 3, comprising a first sub-encoder, to encode said input data sequence into a first coded sequence.

8. A switchable-output encoder according to claim 7, wherein said encoder comprises an interleaver, to interleave said input data sequence into an interleaved sequence.

9. A switchable-output encoder according to claim 8, further comprising a second sub-encoder, connected to said interleaver, to encode said interleaved data sequence into a second coded sequence.

10. A switchable-output encoder according to claim 9, further comprising a switch connected to said interleaver and to said second sub-encoder, wherein said switch is operable to provide one of said interleaved sequence and said second coded sequence as a switch output sequence, thereby affecting the composition of said encoder output sequence.

11. A switchable-output encoder according to claim 10, further comprising an automatic controller, connected to said switch, said automatic controller being operable to monitor predetermined communication parameters in order to determine a required one of said encoder modes, and to control switch operation accordingly.

12. A switchable-output encoder according to claim 10, wherein in order to provide said turbo coding mode, said switch is settable to send said second coded sequence for output, and in order to provide said degenerated turbo coding mode, said switch is settable to send said interleaved sequence for output.

13. A switchable-output encoder according to claim 10, further comprising a multiplexer, connected to said encoder input, to said first sub-encoder, and to said switch, to multiplex said input data sequence, said first encoded sequence, and said switch output sequence into a single multiplexed sequence.

14. A switchable-output encoder according to claim 13, wherein said multiplexed sequence serves as said error-protection encoded output sequence.

15. A switchable-output encoder according to claim 7, wherein said first sub-encoder comprises a convolutional coder.

16. A switchable-output encoder according to claim 9, wherein said second sub-encoder comprises a convolutional coder.

17. A switchable-output encoder according to claim 9, wherein said first sub-encoder and said second sub-encoder are recursive systematic convolutional encoders.

18. A switchable decoder for decoding a received sequence comprising error-protection encoded data, received from a noisy channel into an estimate of an input sequence, wherein said decoder is switchable between two modes, said modes comprising a relatively complex decoding mode suitable for a relatively high noise level channel and a relatively simple decoding mode suitable for a relatively low noise level channel, and wherein said relatively complex mode comprises a turbo decoding mode.

19. A switchable decoder according to claim 18, wherein said relatively simple decoding mode comprises a degenerated version of said relatively complex decoding mode.

20. A switchable decoder according to claim 18, wherein said relatively simple decoding mode comprises a degenerated turbo decoding mode.

21. A switchable decoder according to claim 18, wherein said relatively simple decoding mode comprises a convolutional decoding mode.

22. A switchable decoder according to claim 20, operable to process said received sequence as a multiplexed sequence comprising at least three component sub-sequences.

23. A switchable decoder according to claim 22, wherein, when said decoder is in degenerated turbo decoding mode, said decoder is operable to process said first sub-sequence as a data sequence, said second sub-sequence as a directly encoded sub-sequence, and said third sub-sequence as an interleaved data sub-sequence.

24. A switchable decoder according to claim 18, comprising a separator, operable to separate the received data sequence into a first, a second, and a third data sub-sequence.

25. A switchable decoder according to claim 24, further comprising a first switch, connected to said sub-decoders, wherein said first switch is operable to connect the decoder output to the first sub-decoder output when said decoder is in relatively complex decoding mode, and to connect the decoder output to the second sub-decoder output when said decoder is in relatively simple decoding mode.

26. A switchable decoder according to claim 25, wherein said first sub-decoder is operable as a turbo decoder, and said second sub-decoder is operable as a degenerated turbo decoder.

27. A switchable decoder according to claim 26, wherein said degenerated turbo decoder comprises a de-interleaver for de-interleaving said third sub-sequence to form a de-interleaved sub-sequence.

28. A switchable decoder according to claim 27, wherein said degenerated turbo decoder further comprises a convolutional code decoder for decoding said first sub-sequence, said second sub-sequence, and said de-interleaved sub-sequence into said estimate of an input sequence.

29. A switchable decoder according to claim 28, wherein said convolutional code decoder comprises a hard-decision trellis decoder.

30. A switchable decoder according to claim 28, wherein said convolutional code decoder comprises a soft-decision trellis decoder.

31. A switchable decoder according to claim 25, further comprising a second switch, connected to said separator, wherein when said decoder is in relatively complex decoding mode said second switch is settable to connect said separator output sub-sequences to inputs of said first sub-decoder, and when said decoder is in relatively simple decoding mode said second switch is settable to connect said separator outputs to inputs of said second sub-decoder.

32. A switchable decoder according to claim 25, further comprising an automatic controller connected to said first switch, said automatic controller being operable to monitor predetermined communication parameters in order to determine a required one of said decoder modes, and to control switch operation accordingly.

33. A switchable decoder according to claim 31, further comprising an automatic controller, connected to said second switch, said automatic controller being operable to monitor predetermined communication parameters in order to determine a required one of said decoder modes, and to control switch operation accordingly.

34. A switchable data encoder-decoder system, comprising a switchable-output encoder for encoding an input sequence to form an error protection encoded output sequence and a switchable decoder, for decoding a received sequence into an estimate of said input sequence, wherein said encoder and said decoder are synchronously switchable between two modes of operation, said modes comprising a relatively complex mode suitable for a relatively high noise level channel and a relatively simple mode suitable for a relatively low noise level channel, and wherein said relatively complex mode comprises a turbo coding/decoding mode.

35. A switchable data encoder-decoder system according to claim 34, wherein said relatively simple mode comprises a degenerated version of said relatively complex mode.

36. A switchable data encoder-decoder system according to claim 34, wherein said relatively simple mode comprises a degenerated turbo coding/decoding mode.

37. A switchable data encoder-decoder system according to claim 34, wherein said relatively simple mode comprises a convolutional coding/decoding mode.

38. A switchable data encoder-decoder system according to claim 36, wherein when said encoder-decoder system is in turbo coding/decoding mode said encoder is operable to output a multiplexed signal comprising three sub-sequences, said sub-sequences comprising said input data sequence, a first coded sequence, and an interleaved and encoded data sequence.

39. A switchable data encoder-decoder system according to claim 38, wherein when said encoder-decoder system is in degenerated turbo coding/decoding mode said encoder is operable to output a multiplexed signal comprising three sub-sequences, said sub-sequences comprising said input data sequence, a first coded sequence, and an interleaved data sequence.

40. A switchable data encoder-decoder system according to claim 39, wherein when said encoder-decoder system is in degenerated turbo coding/decoding mode said decoder is operable to decode a received version of a multiplexed signal comprising said input data sequence, a first coded sequence, and an interleaved data sequence into an estimate of said input sequence.

41. A switchable data encoder-decoder system according to claim 34, wherein said encoder comprises:

an interleaver to interleave said input signal into an interleaved data sequence;

a first sub-encoder, to encode said input sequence into a first coded sequence;

a second sub-encoder, connected to said interleaver, to encode said input sequence into a second coded sequence;

a switch, connected to said interleaver and to said second sub-encoder, settable to provide said second coded sequence as a switch output sequence when said system is in turbo coding/decoding mode, and to provide said interleaved data sequence as a switch output sequence when said system is in degenerated turbo coding/decoding mode; and

,

a multiplexer, connected to said encoder input, said first sub-encoder, and said switch, to multiplex said data sequence, said first coded sequence, and said switch output sequence into an output sequence.

42. A switchable data encoder-decoder system according to claim 41, wherein said decoder comprises:

a separator, operable to separate the received data sequence into a first, a second, and a third data sub-sequence;

a first sub-decoder, connected to said separator, operable to decode said sub-sequences when said encoder-decoder system is in relatively complex mode;

a second sub-decoder, connected to said separator, operable to decode said sub-sequences when said encoder-decoder system is in relatively simple mode;

a first switch, connected to said sub-decoders, to connect the decoder output to the first sub-decoder output when said decoder is in relatively complex decoding mode, and to connect the decoder output to the second sub-decoder output when said decoder is in relatively simple decoding mode; and

,

a second switch, connected between said separator and said sub-decoders, settable to route said sub-sequences to either of the first and second sub-decoders in accordance with a current mode of operation.

43. A switchable data encoder-decoder system according to claim 42, wherein said encoder-decoder system further comprises an automatic controller, connected to said encoder switch and to said decoder first switch, said automatic controller being operable to monitor predetermined communication parameters in order to determine a required one of said encoder-decoder system modes, and to control switch operation accordingly.

44. A switchable data encoder-decoder system according to claim 42, wherein said first sub-decoder comprises a turbo code decoder.

45. A switchable data encoder-decoder system according to claim 42, wherein said second sub-decoder comprises:

a de-interleaver, connected to said separator, for de-interleaving said third sub-sequence to form a de-interleaved sub-sequence; and

,

a convolutional code decoder, connected to said separator and to said de-interleaver, for decoding said first sub-sequence, said second sub-sequence, and said de-interleaved sub-sequence into said estimate of an input sequence.

46. A switchable data encoder-decoder system according to claim 42, further comprising an automatic controller, connected to said second switch, said automatic controller being operable to monitor predetermined communication parameters in order to determine a required one of said decoder modes, and to control switch operation accordingly.

47. A method for encoding an input data sequence into an error protection encoded output sequence, comprising:

receiving an input data sequence;

interleaving said input sequence to form an interleaved data sequence;

encoding said input sequence to form a first encoded sequence according to a first coding rule;

encoding said interleaved sequence to form a second encoded sequence according to a second coding rule;

selecting either one of said interleaved and said second encoded sequence; and

,

multiplexing said input sequence, said first encoded sequence, and said selected sequence to form said error protection encoded output sequence.

48. A method for encoding an input data sequence into an error protection encoded output sequence according to claim 47, wherein selection is made based on current values of predetermined communication parameters.

49. A method for encoding an input data sequence into an error protection encoded output sequence according to claim 47, wherein said first encoding rule comprises convolutional coding.

50. A method for encoding an input data sequence into an error protection encoded output sequence according to claim 47, wherein said second encoding rule comprises convolutional coding.

51. A method for decoding a received sequence comprising error-protection encoded data received from a noisy channel into an estimate of an input sequence, comprising:

receiving said sequence from said noisy channel;

separating said received sequence into a first, a second, and a third data sub-sequence;

selecting either one of a first sub-decoder and a second sub-decoder; and

,

decoding said sub-sequences into said estimate of an input sequence using the selected sub-decoder.

52. A method for decoding a received sequence comprising error-protection encoded data received from a noisy channel into an estimate of an input sequence according to claim 51, wherein selection is made based on current values of predetermined communication parameters.

53. A method for decoding a received sequence comprising error-protection encoded data received from a noisy channel into an estimate of an input sequence according to claim 51, wherein said first sub-decoder comprises a turbo code decoder.

54. A method for decoding a received sequence comprising error-protection encoded data received from a noisy channel into an estimate of an input sequence according to claim 51, wherein the method by which said second sub-decoder decodes said first, second, and third data sub-sequences comprises:

de-interleaving said third sub-sequence into a deinterleaved sub-sequence; and

,

decoding said first, said second, and said de-interleaved sub-sequences into said estimate of an input sequence using a convolutional code decoder.

55. A method for decoding a received sequence comprising error-protection encoded data received from a noisy channel into an estimate of an input sequence according to claim 54, wherein said convolutional code decoder comprises a hard-decision trellis decoder.

56. A method for decoding a received sequence comprising error-protection encoded data received from a noisy channel into an estimate of an input sequence according to claim 54, wherein said convolutional code decoder comprises a soft-decision trellis decoder.