Control scheme for distortion reduction

• US 20030102914A1
• Filed: 10/29/2002
• Published: 06/05/2003
• Est. Priority Date: 12/02/1999
• Status: Active Grant

• Current Assignee: Andrew LLC (CommScope Holding Company, Inc.)
• Original Assignee: Andrew Corporation (CommScope Holding Company, Inc.)
• Inventors: Kenington, Peter, New, Anthony
• Granted Patent: US 6,707,338 B2
• Time in Patent Office: Days
• US Class Current: 330/149
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 1/3258 based on polynomial terms
• CPC Class Codes: H03F 1/3294 Acting on the real and imaginary components of the input signal

Abstract

In predistorter (100), non-linear element (126) generates a distortion signal which is injected into the input (110) of a non-linear power amplifier (112 at 118). The distortion signal is optimised by a vector modulator to cancel distortion caused by amplifier (112). The control signals for the vector modulator are provided by a digital signal processor (FIG. 2). The input signal (110) and the output signal (114) are sampled and processed to produce an audio frequency error signal which is correlated in the DSP to produce the control signals for the vector modulator whilst avoiding analogue correlation problems.

Claims

1. A method of reducing the appearance of distortion in an output signal which a signal handling means produces in response to an input signal, the method comprising:

sampling both the input and output signals;

frequency shifting one of the sampled signals by a frequency offset amount;

converting, by incoherent detection, the frequency-offset sampled signal and the other sampled signal to baseband signals, processing the baseband signals to produce control signals; and

predistorting the input signal under control of the control signals.

2. A method according to claim 1, including multiplying the sampled input signal with itself to produce a first reference signal which is one order higher than a target distortion component of a particular order in the output signal.

3. A method according to claim 2, including multiplying the sampled input signal with the sampled output signal to produce a second reference signal.

4. A method according to claim 3, including multiplying the first and second reference signals together to produce a third reference signal at the offset frequency

5. A method according to claim 4, including multiplying, in the digital or analogue domain, the third reference signal with a signal at the offset frequency to produce DC signals for controlling the predistortion process.

6. A method according to any one of claims 2 to 5, wherein the target distortion component is a third order distortion component.

7. A method according to any preceding claim, wherein the predistorting step reduces distortion in the form of one specific distortion component of one specific order.

8. A method according to any one of claims 1 to 6, wherein the predistorting step reduces distortion in the form of several distortion components of different orders.

9. A method according to claim 8, further comprising multiplying the sampled input signal with itself to produce further reference signals each one order higher than a corresponding target distortion component appearing in the output signal.

10. A method according to claim 9, further comprising multiplying each further reference signal with the second reference signal to produce modified further reference signals at the offset frequency.

11. A method according to claim 10, comprising multiplying, in the digital or analogue domain, each modified further reference signal with a signal at the offset frequency to produce DC signals for controlling the predistortion process.

12. A method according to any preceding claim, wherein the sampled input signal is the one of the sampled signals which is frequency shifted by the frequency offset amount.

13. A method according to any one of claims 1 to 11, wherein the sampled output signal is the one of the sampled signals which is frequency shifted by the frequency offset amount.

14. A method according to any preceding claim, wherein the DC signals are used to control the I and Q paths of one or more vector modulators in the predistortion process.

15. A method according to any preceding claim, wherein the DC signals are used for controlling amplitude and/or phase of one or more signals in the predistortion process.

16. A method according to any preceding claim, wherein the signal handling means is amplifying means.

17. A method according to any preceding claim, wherein the predistortion process comprises multiplying the input signal with itself to produce a predistortion signal for injection into the input signal.

18. A method according to any one of claims 1 to 16 wherein the predistortion process is diode, FET, Bipolar transistor, dual-gate FET or mixer based.

19. A method according to any preceding claim, comprising using the first reference signal or one of the further reference signals to control the level of the sampled input signal.

20. A method as substantially hereinbefore described with reference to the accompanying figures.

21. Apparatus for reducing the appearance of distortion in an output signal which a signal handling means produces in response to an input signal, the apparatus comprising means for sampling both the input and output signals, means for frequency shifting one of the sampled signals by a frequency offset amount, means for converting, by coherent detection, the frequency offset sampled signal and the other sampled signal to baseband signals, means for processing the baseband signals to produce control signals, and means for predistorting the input signal under control of the control signals.

22. Apparatus according to claim 21, including means for multiplying the sampled input signal with itself to produce a first reference signal which is one order higher than a target distortion component of a particular order in the output signal.

23. Apparatus according to claim 22, including means for multiplying the sampled input signal with the sampled output signal to produce a second reference signal.

24. Apparatus according to claim 23, including means for multiplying the first and second reference signals together to produce a third reference signal at the offset frequency.