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Semiconductor memory device reading data based on memory cell passing current during access

  • US 20030103395A1
  • Filed: 06/04/2002
  • Published: 06/05/2003
  • Est. Priority Date: 12/03/2001
  • Status: Active Grant
First Claim
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1. A semiconductor memory device comprising:

  • a plurality of memory cells each having passing current changing in accordance with storage data during access;

    an access current transmitting circuit for passing, to a first node, an access current corresponding to said passing current of a selected memory cell selected from said plurality of memory cells as an access target;

    a reference current generating circuit for passing a reference current to a second node during data reading;

    a current comparing circuit for producing a read voltage corresponding to a difference between currents flowing through said first and second nodes, respectively; and

    a test current supply circuit for supplying an externally test current to at least one of said first and second nodes in a test mode.

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