Semiconductor manufacturing using modular substrates

• US 20030107117A1
• Filed: 11/25/2002
• Published: 06/12/2003
• Est. Priority Date: 08/21/2000
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Patel, Nitin, Vartuli, Catherine, Houge, Erik Cho, Antonell, Michael, Plew, Larry E.
• Granted Patent: US 6,713,409 B2
• Time in Patent Office: Days
• US Class Current: 257/684
• CPC Class Codes: H01L 21/67346 characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633

Abstract

A manufacturing method using a modular substrate-based processing scheme for producing semiconductor devices, provides multiple modular processing units which may be arranged together to form any of various cohesive processing units or individually or sequentially processed through standard semiconductor processing equipment. The cohesive processing units are processed unitarily providing for multiple modular processing units to be processed simultaneously. The modular processing units may be formed of a thick semiconductor substrate or a semiconductor substrate mounted on a further substrate such as a ceramic material. The modular processing units may each contain ribs, grooves, posts or other features to aid in handling and placement of the individual units.

Claims

1. A method for forming a semiconductor device, comprising the steps of:

(a) providing a plurality of modular semiconductor substrate units, each adapted for having at least one semiconductor device formed thereon;

(b) configuring a first cohesive processing unit including a first group of modular semiconductor substrate units of said plurality of modular semiconductor substrate units arranged in a fixed two-dimensional array, to be processed simultaneously through a first processing operation;

(c) processing said first cohesive processing unit through said first processing operation;

(d) configuring a second cohesive processing unit including a second group of modular semiconductor substrate units of said plurality of modular semiconductor substrate units arranged in a further fixed two-dimensional array, to be processed simultaneously through a second processing operation; and

(e) processing said second cohesive processing unit through said second processing operation.

2. The method as in claim 1, further comprising the step of:

(c1) testing at least one of said first group of modular semiconductor substrate units and replacing each defective modular semiconductor substrate unit thereof, with a further modular semiconductor substrate unit of said plurality of modular semiconductor substrate units, to form said second group of modular semiconductor substrate units.

3. The method as in claim 1, wherein said first processing operation comprises coating with a photosensitive film, and said second processing operation comprises patterning said photosensitive film formed on each of said second group of modular semiconductor substrate units of said second cohesive processing unit.

4. The method as in claim 1, wherein said first processing operation comprises forming a photolithographic pattern on each of said first group of modular semiconductor substrate units of said first cohesive processing unit.

5. The method as in claim 2, wherein at least one of said first processing operation and said second processing operation comprises one of sputter deposition, chemical vapor deposition, plasma vapor deposition, coating, evaporation, etching, patterning, cleaning, diffusion, ion implantation and polishing.

6. The method as in claim 1, wherein said first cohesive processing unit further includes a test monitor further arranged along said plane.

7. The method as in claim 1, wherein each of said plurality of modular semiconductor substrate units comprises a semiconductor substrate mounted on a base substrate.

8. The method as in claim 7, wherein said base substrate is formed of one of silicon, teflon, glass and ceramic.

9. The method as in claim 1, wherein each of said plurality of modular semiconductor substrate units is substantially the same size.

10. A method for forming a semiconductor device, comprising the steps of:

(a) simultaneously processing a first plurality of semiconductor devices through a first processing operation, said first plurality of semiconductor devices being formed on a first plurality of discrete semiconductor units fixedly arranged along a plane, each semiconductor unit including at least one of said semiconductor devices being formed thereon;

(b) testing at least one of said semiconductor devices;

(c) replacing each defective semiconductor unit with a further semiconductor unit which includes at least one semiconductor device formed thereon, to form a second plurality of semiconductor devices which are formed on a second plurality of discrete semiconductor units; and

(d) simultaneously processing said second plurality of semiconductor devices through a second processing operation, said second plurality of discrete semiconductor units being fixedly arranged along a plane.

11. A method for forming a semiconductor device, comprising the steps of:

(a) providing a plurality of modular processing units, each adapted for having at least one semiconductor device formed on a semiconductor surface thereof, and adapted for being individually processed through semiconductor processing equipment;

(b) configuring a first cohesive processing unit including a first group of modular processing units of said plurality of modular processing units arranged along a fixed, two-dimensional array, to be processed simultaneously through a first processing operation;

(c) processing said first cohesive processing unit through said first processing operation; and

(d) processing each of said modular processing units through a second processing operation individually.

12. The method as in claim 11, in which said step (d) includes processing a test monitor through said second processing operation.

13. The method as claim 11, further comprising step (c1) further processing remaining modular processing units of said plurality of modular processing units through said first processing operation;

and

step (c2);

after each of said plurality of modular processing units has been processed through said first processing operation, removing defective modular processing units from said plurality of modular semiconductor substrate units prior to step (d).

14. The method as in claim 11, wherein each of said modular processing units comprises a semiconductor substrate having said semiconductor surface mounted on a base substrate.