Sparse refresh of display

• US 20030107579A1
• Filed: 12/07/2001
• Published: 06/12/2003
• Est. Priority Date: 12/07/2001
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Willis, Thomas E., Midford, Steven L.
• Granted Patent: US 6,995,771 B2
• Time in Patent Office: Days
• US Class Current: 345/545
• CPC Class Codes: G09G 2320/103 Detection of image changes, e.g. determination of an index representative of the image change
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

A method, apparatus, and signal-bearing medium for sending to a display device modified regions of a frame buffer. A frame buffer is divided into the regions, and data in the frame buffer represents pixels on the display device. The frame buffer accumulates writes until the region being written to changes, at which time the region is copied to the display device.

Claims

1. A method, comprising:

detecting a write command to a frame buffer;

determining a region in the frame buffer associated with a frame buffer address in the write command; and

determining whether the region is the same as a last-modified region.

2. The method of claim 1, further comprising:

when the region is not the same as the last-modified region,

sending the region to a display device associated with the frame buffer, and

setting the last-modified region to be the region.

3. The method of claim 1, further comprising:

when the region is the same as the last-modified region, refraining from sending the region to the display device until a different region is detected.

4. The method of claim 1, wherein the write command is issued by a graphics engine to the frame buffer.

5. The method of claim 1, wherein the frame buffer comprises a plurality of regions each representing a plurality of pixels on a display device, and wherein the region is one of the plurality of regions.

6. The method of claim 5, wherein the plurality of regions represent the plurality of pixels in a rectangular shape on the display device.

7. The method of claim 6, wherein each of the plurality of regions represents a same number of pixels.

8. The method of claim 4, wherein the detecting is carried out by logic connected to the frame buffer and the graphics engine.

9. An apparatus, comprising:

a graphics engine to;

generate a write command having an associated region in a frame buffer,

determine whether scan-out logic is accessing the associated region in the frame buffer, and

store the write command in memory associated with the graphics engine when the scan-out logic accesses the associated region in the frame buffer.

10. The apparatus of claim 9, wherein the graphics engine is further to:

send the write command to the frame buffer when the scan-out logic is not accessing the associated region in the frame buffer.

11. The apparatus of claim 9, wherein the frame buffer comprises a plurality of regions each representing a plurality of pixels on a display device, and wherein the associated region is one of the plurality of regions.

12. An apparatus for writing to a display device, comprising:

a frame buffer comprising a plurality of regions, wherein each region represents a respective plurality of pixels on the display device; and

logic to accumulate writes by a graphics engine to one of the plurality of regions in the frame buffer until the graphics engine writes to another region of the plurality of regions in the frame buffer, wherein when the graphics engine writes to the another region, the logic is to cause the one region to be written to the display device.

13. The apparatus of claim 12, wherein the logic comprises a plurality of D-type flip-flops.

14. The apparatus of claim 13, wherein one of the plurality of D-type flip-flops is to receive input of a region number of the one region and a clock input to be active when each of the respective writes occurs.

15. A signal-bearing medium comprising instructions, which when read and executed by a processor comprise:

accumulating writes by a graphics engine to one of a plurality of regions in a frame buffer, wherein the plurality of regions represent respective pixels on a display device;

detecting that the graphics engine has written to another region of the plurality of regions in the frame buffer; and

in response to the detecting, causing the one region to be written to the display device.

16. The signal-bearing medium of claim 15, wherein the detecting further comprises converting frame buffer addresses in the writes to region numbers.

17. The signal-bearing medium of claim 15, wherein the causing further comprises:

instructing scan-out logic to copy the one region from the frame buffer to the display device asynchronously from the writes to the frame buffer.

18. An apparatus, comprising:

a first D-type flip-flop including

a first data input to indicate a region number of a region currently being written to a frame buffer, and

a first clock input to be active when a write to the frame buffer has occurred.

19. The apparatus of claim 18, further comprising:

a second D-type flip-flop, including

a second data input coupled to a first output of the first D-type flip-flop, and

a second clock input coupled to a compare logic output.

20. The apparatus of claim 19, further comprising:

a third D-type flip-flop, comprising;

a third data input coupled to a second output of the second D-type flip-flop, and

a third clock input to be active when the write to the frame buffer has occurred.

21. The apparatus of claim 20, further comprising:

compare logic, comprising;

a first compare data input coupled to the second output of the second D-type flip-flop, and

a second compare data input coupled to the first output of the first D-type flip-flop.

22. The apparatus of claim 20, where the third D-type flip-flop further comprises:

a third output to indicate a region number of a region to be sent to a display device, wherein the third output is connected to a scan-out logic, wherein the scan-out logic is connected to a display device..

23. A electronic device comprising:

a frame buffer comprising a plurality of regions each representing a respective plurality of pixels on a display device;

a graphics engine to initiate writes to one of the plurality of regions in the frame buffer;

snoop logic to cause the frame buffer to accumulate the writes; and

scan-out logic to write the one of the plurality of regions from the frame buffer to the display device when instructed by the snoop logic.

24. The electronic device of claim 23, wherein the snoop logic comprises a plurality of D-type flip-flops.

25. The electronic device of claim 24, wherein the D-type flip-flop further comprises an exclusive-or gate.

26. An electronic device, comprising:

a graphics engine to, for every respective modified region in a set of candidate regions,

copy the respective modified region from a frame buffer to a display,

when the respective modified region was written to during the copy, mark the respective modified region as modified, and

when the respective modified region was not written to during the copy, mark the respective modified region as not modified.

27. The electronic device of claim 26, wherein the set of candidates comprises all regions that have not been written to during a most recent period of time.

28. The electronic device of claim 26, wherein the set of candidates comprises all regions except a number of most-recently written to regions.

29. The electronic device of claim 26, wherein the set of candidates comprises a number of least-recently written to regions.

30. The electronic device of claim 26, wherein the set of candidates comprises all regions being displaced from the frame buffer.