Silicon semiconductor wafer, and process for producing a multiplicity of semiconductor wafers
First Claim
1. A silicon semiconductor wafer having a diameter of greater than or equal to 200 mm comprising a polished front surface and a polished back surface and a maximum local flatness value SFQRm-1 of less than or equal to 0.13 μ
- m, based on a surface grid of segments with a size of 26 mm×
8 mm on the front surface, wherein the maximum local height deviation P/V(10×
10)max of the front surface from an ideal plane is less than or equal to 70 nm, based on sliding subregions with dimensions of 10 mm×
10 mm.
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Accused Products
Abstract
A silicon semiconductor wafer with a diameter of greater than or equal to 200 mm and a polished front surface and a polished back surface and a maximum local flatness value SFQRm-1 of less than or equal to 0.13 μm, based on a surface grid of segments with a size of 26 mm×8 mm on the front surface, wherein the maximum local height deviation P/V(10×10)m-1 of the front surface from an ideal plane is less than or equal to 70 nm, based on sliding subregions with dimensions of 10 mm×10 mm. There is also a process for producing a multiplicity of silicon semiconductor wafers by simultaneous double-side polishing between in each case one lower polishing plate and one upper polishing plate, which rotate, are parallel to one another and to which polishing cloth has been adhesively bonded, while a polishing agent, which contains abrasives or colloids, is being supplied, with at least 2 μm of silicon being removed, wherein a predetermined proportion of the semiconductor wafers is at least partially polished using a lower polishing pressure, and a further proportion of the semiconductor wafers is polished using a higher polishing pressure.
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Citations
25 Claims
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1. A silicon semiconductor wafer having a diameter of greater than or equal to 200 mm comprising
a polished front surface and a polished back surface and a maximum local flatness value SFQRm-1 of less than or equal to 0.13 μ - m, based on a surface grid of segments with a size of 26 mm×
8 mm on the front surface, wherein the maximum local height deviation P/V(10×
10)max of the front surface from an ideal plane is less than or equal to 70 nm, based on sliding subregions with dimensions of 10 mm×
10 mm. - View Dependent Claims (2, 3, 4, 25)
- m, based on a surface grid of segments with a size of 26 mm×
-
5. A process for producing a multiplicity of silicon semiconductor wafers comprising
simultaneous double-side polishing between in each case one lower polishing plate and one upper polishing plate, which rotate, are parallel to one another and to which polishing cloth has been adhesively bonded, while a polishing agent, which contains a substance selected from the group consisting of abrasives and colloids, is being supplied, with at least 2 μ - m of silicon being removed,
wherein a predetermined proportion of the semiconductor wafers is at least partially polished using a lower polishing pressure, and a further proportion of the semiconductor wafers is polished rising a higher polishing pressure. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
- m of silicon being removed,
Specification