Method and system for use of a field programmable gate array (FPGA) cell for controlling access to on-chip functions of a system on a chip (SOC) integrated circuit
First Claim
1. A system on a chip (SOC) integrated circuit comprising:
- a plurality of logic functions, the plurality of logic functions including a plurality of base functions and a plurality of peripheral functions; and
at least one field programmable gate array (FPGA) cell, coupled to the plurality of peripheral functions, wherein the FPGA cell can be configured to selectively enable the plurality of peripheral functions.
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Accused Products
Abstract
A system on a chip (SOC) integrated circuit is disclosed. The SOC integrated circuit includes a plurality of logic functions. The logic functions include a plurality of base functions and a plurality of peripheral functions. The SOC integrated circuit includes at least one field programmable gate array (FPGA) cell that is coupled to the plurality of peripheral functions. The FPGA cell can then be configured to selectively enable the plurality of peripheral functions. Accordingly, one or more FPGA cells are provided on an SOC. The FPGA cells can then be selectively configured to enable one or more peripheral chip functions. Because FPGAs are customized “in the field”, i.e., in a specific customer application, one SOC part number containing all peripheral functions can be used to satisfy multiple customer markets.
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Citations
12 Claims
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1. A system on a chip (SOC) integrated circuit comprising:
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a plurality of logic functions, the plurality of logic functions including a plurality of base functions and a plurality of peripheral functions; and
at least one field programmable gate array (FPGA) cell, coupled to the plurality of peripheral functions, wherein the FPGA cell can be configured to selectively enable the plurality of peripheral functions. - View Dependent Claims (2, 3, 4, 5)
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6. A system on a chip (SOC) integrated circuit comprising:
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a plurality of logic functions, the plurality of logic functions including a plurality of base functions and a plurality of peripheral functions;
a plurality of buses; and
a plurality of field programmable gate array (FPGA) cells, each of the plurality of FPGA cells coupled to a portion of the peripheral functions and to one of the plurality of buses, wherein each of the plurality of FPGA cells can be configured to selectively enable a number of peripheral functions. - View Dependent Claims (7, 8, 9)
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10. A SOC integrated circuit on a chip (SOC) integrated circuit comprising:
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a plurality of logic functions, the plurality of logic functions including a plurality of base functions and a plurality of peripheral functions;
a plurality of buses, wherein the plurality of buses comprises a processor local bus (PLB) and an on-chip peripheral bus (OPB), and a plurality of field programmable gate array (FPGA) cells, each of the plurality of FPGA cells coupled to a portion of the peripheral functions and to one of the plurality of buses, wherein each of the plurality of FPGA cells can be configured to selectively enable the portion of peripheral functions, wherein the FPGA cell can be programmed to complete connections from one of the plurality of buses to the peripheral functions or tie the peripheral functions to an inactive state, and wherein the FPGA cell is programmed through a register coupled thereto. - View Dependent Claims (11, 12)
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Specification