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Aligning apparatus in semiconductor device test handler

  • US 20030111970A1
  • Filed: 12/09/2002
  • Published: 06/19/2003
  • Est. Priority Date: 12/17/2001
  • Status: Active Grant
First Claim
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1. An aligning apparatus in a semiconductor device handler, comprising:

  • first and second guide members installed in parallel at a handler body to confront each other;

    third and fourth guide members installed in parallel with and under the first and second guide members, respectively;

    a first aligner having both ends coupled with the first and second guide members respectively to move along the first and second guide members wherein a plurality of device landing recesses are arranged on the first aligner to leave a predetermined interval from each other;

    a second aligner having both ends coupled with the third and fourth guide members respectively to be installed in a level lower than that of the first aligner wherein a plurality of device landing recesses are arranged on the second aligner to leave a predetermined interval from each other;

    a first driving means for driving the first aligner along the first and second guide members; and

    a second driving means for driving the second aligner along the third and fourth guide members separately from the first aligner.

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