Reconfigurable input Galois field linear transformer system

• US 20030115234A1
• Filed: 05/01/2002
• Published: 06/19/2003
• Est. Priority Date: 12/18/2001
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Stein, Yosef, Primo, Haim, Sapir, Yaniv
• Granted Patent: US 7,269,615 B2
• Time in Patent Office: Days
• US Class Current: 708/492
• CPC Class Codes: G06F 7/724 Finite field arithmetic for error detection or correction in general H03M13/00, in computers G06F11/10

Abstract

A reconfigurable input Galois field linear transformer system includes a Galois field linear transformer including a matrix of cells; a plurality of storage planes for storing control patterns representing a number of different functions; a storage plane selector circuit for selecting a storage plane representing a function for enabling the cells of the matrix which defines that function; and a reconfigurable input circuit for delivering input data to the enabled cells to apply that function to the input data.

Claims

1. A reconfigurable input Galois field linear transformer system comprising:

a Galois field linear transformer including a matrix of cells;

a plurality of storage planes for storing control patterns representing a number of different functions;

a storage plane selector circuit for selecting a said storage plane representing a said function for enabling the cells of said matrix which define that function; and

a reconfigurable input circuit for delivering input data to said enabled cells to apply that function to the input data.

2. The reconfigurable input Galois field linear transformer system of claim 1 in which each said cell includes an exclusive OR logic circuit, an AND logic circuit having an output connected to said exclusive OR logic circuit, and an input for receiving an input data bit.

3. The reconfigurable input Galois field linear transformer system of claim 1 in which each said storage plane includes a storage device associated with each said cell.

4. The reconfigurable input Galois field linear transformer system of claim 3 in which each said storage device includes a plurality of storage units disposed with the associated cell, one storage unit corresponding to each said storage plane.

5. The reconfigurable input Galois field linear transformer system of claim 3 in which each said storage device includes a multistage register disposed with the associated cell, one stage corresponding to each said storage plane.

6. The reconfigurable input Galois field linear transformer system of claim 1 in which said storage plane selector circuit includes a plane selection register.

7. The reconfigurable input Galois field linear transformer system of claim 1 in which said reconfigurable input circuit includes at least a first input register and a switching system for directing the input data from said first input register to said enabled cells.

8. The reconfigurable input Galois field linear transformer system of claim 7 in which said switching system includes a plurality of switching circuits one associated with each byte of input data in said first input register.

9. The reconfigurable input Galois field linear transformer system of claim 7 in which there is a second input register and said switching system directs input data selectively from said first and second input registers to said enabled cells.

10. The reconfigurable input Galois field linear transformer system of claim 3 in which said storage device is programmable.

11. The reconfigurable input Galois field linear transformer system of claim 8 in which said switching circuits includes a multiplexor for presenting inputs from said input registers.