Post-fuse blow corrosion prevention structure for copper fuses

• US 20030116820A1
• Filed: 09/25/2002
• Published: 06/26/2003
• Est. Priority Date: 09/01/1999
• Status: Active Grant

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: Anthony K. Stamper, Daniel C. Edelstein, Robert M. Geffken, Steven H. Voldman, Timothy H. Daubenspeck, William T. Motsiff
• Inventors: Voldman, Steven H., Daubenspeck, Timothy H., Edelstein, Daniel C., Stamper, Anthony K., Motsiff, William T., Geffken, Robert M.
• Granted Patent: US 6,746,947 B2
• Time in Patent Office: Days
• US Class Current: 257/529
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 23/5258 the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A structure and method of fabricating a semiconductor corrosion resistant metal fuse line including a refractory liner which can also act as a resistor is disclosed. Fabrication is accomplished using damascene process. The metal structure can be formed on a semiconductor substrate including a first portion including a first layer and a second layer, the first layer having higher resistivity than the second layer, the second layer having horizontal and vertical surfaces that are in contact with the first layer in the first portion, and a second portion coupled to the first portion, the second portion being comprised of the first layer, the first layer not being in contact with the horizontal and vertical surfaces of the second layer in the second portion. The metal structure can be used as a corrosion resistant fuse. The metal structure can also be used as a resistive element.

The high voltage tolerant resistor structure allows for usage in mixed-voltage, and mixed signal and analog/digital applications. The resistor element has low capacitance, low skin effect, high linearity, a high melting temperature, and a high critical current to failure. The resistor structure can be formed on the walls of a dielectric trough. The structure can be applied to circuit applications such as an ESD network, an RC-coupled MOSFET, a resistor ballasted MOSFET and others. The resistors can be in series with the MOSFET or other structures.

Claims

1. A metal structure formed on a semiconductor substrate, comprising:

a first portion comprised of a first layer and a second layer, said first layer having higher electrical resistivity than said second layer, said second layer having horizontal and vertical surfaces that are in contact with said first layer in said first portion; and

a second portion coupled to said first portion, said second portion being comprised of said first layer, said first layer not being in contact with said horizontal and vertical surfaces of said second layer in said second portion.

2. The metal structure according to claim 1, wherein said first layer has a non-corrosive nature preventing regrowth of blown fuses.

3. The metal structure according to claim 1, wherein said first layer comprises a liner material.

4. The metal structure according to claim 1, wherein said first layer comprises a refractory material.

5. The metal structure according to claim 4, wherein said refractory material comprises at least one of Ta, α

-Ta, TaN, and TaN/Ta.

6. The metal structure according to claim 1, wherein said first layer acts as a resistor.

7. A metal structure formed on a semiconductor substrate, comprising:

a first dielectric film on the substrate;

a first trough included in said dielectric film; and

a first conductive film deposited abutting at least one surface of said first trough.

8. The metal structure of claim 7, wherein said first trough includes at least one of a rectangular and a v-shape.

9. The metal structure of claim 7, further comprising a second conductive film abutting said first conductive film.

10. The metal structure of claim 7, further comprising a second dielectric film including an oxide.

11. A metal structure formed on a semiconductor substrate, comprising:

a trough; and

a refractory material deposited on at least one side of said trough.

12. The metal structure according to claim 11, further comprising an interlevel via in contact with said trough.

13. The metal structure of claim 11, wherein said refractory material comprises at least one of Ta, α

-Ta, TaN, and TaN/Ta.

14. The metal structure of claim 11, wherein said refractory material acts as a noncorrosive liner to prevent regrowth of blown fuses.

15. The metal structure of claim 11, wherein said refractory material is used as a resistor.

16. A method for forming a refractory element barrier to fuse corrosion regrowth, comprising the steps of:

(1) lithographically patterning, etching, depositing a liner, depositing copper and using chemical mechanical polishing (CMP) to damascene a last metal (LM) wiring level and fuse;

(2) applying a resist and lithographically patterning one or more openings over said fuse;

(3) removing exposed copper using an etchant that is selective to said exposed copper wherein said etchant does not attack said liner;

(4) removing said resist and depositing final passivation films, and completing definition of terminal metal contact holes in final passivation films; and

(5) electrically testing and laser deleting said fuse, wherein said fuse is comprised of at least one of a segment of liner and a segment of copper LM line isolated on at least one side by a “

liner only”

structure.

17. The method according to claim 16, wherein said liner comprises refractory material films.

18. The method according to claim 16, wherein said refractory films comprise at least one of Ta, α

-Ta, TaN, and TaN/Ta.

19. The method according to claim 16, wherein said etchant is selective to said line wherein said etchant comprises at least one of aqueous ammonium persulfate and a mixture of dilute sulfuric acid with hydrogen peroxide.

20. A method for forming a refractory element, comprising the steps of:

(1) lithographically patterning, etching, depositing a refractory liner including at least one of Ta, α

-Ta, TaN, and TaN/Ta, depositing copper and chemically mechanically polishing(CMP) to damascene a last metal (LM) wiring level and fuses;

(2) depositing a barrier nitride layer, preceded by pretreating with a standard plasma;

(3) patterning wafers, opening up a fuse window, etching said barrier nitride, etching said copper wherein an etchant is selective to said refractory liner; and

(4) depositing a final passivation oxide/nitride layer, processing wafers through standard terminal via and laser blowing said fuse.

21. A circuit comprising:

a damascene resistor element coupled as part of the circuit;

an electrostatic discharge (ESD) network coupled as part of the circuit; and

a peripheral input/output (I/O) circuit coupled as part of the circuit.

22. A circuit comprising:

a pad coupled as part of the circuit;

a damascene resistor element coupled as part of the circuit;

a capacitor element coupled as part of the circuit; and

a MOSFET coupled as part of the circuit.

23. A circuit comprising:

a pad coupled as part of the circuit;

a MOSFET coupled as part of the circuit; and

a plurality of damascene resistor elements formed at said MOSFET source or drain contacts.

24. A circuit, comprising:

a pad;

a MOSFET coupled as part of the circuit; and

a plurality of damascene resistor elements formed in series with at least one of said MOSFET source and drain contacts.

25. A resistor structure comprising:

a damascene defined trough;

a thin conductive film adjacent to walls of said trough; and

an insulator film forming a resistor structure in said trough.

26. The resistor structure of claim 25, further comprising:

a W contact.

27. The resistor structure of claim 26, further comprising:

a W film.

28. A resistor structure comprising:

a dual-damascene defined trough and via;

a thin conductive film adjacent to walls of said trough; and

an insulator film in said trough.

29. The resistor structure according to claim 28, further comprising:

a second dual-damascene defined trough and via;

a single damascene defined trough;

a thin conductive film adjacent to walls of said single damascene defined trough; and

an insulator film in said trough.

30. A circuit comprising:

a pad;

a first ESD element coupled to said pad;

a damascene resistor (DR) element coupled to said first ESD element;

a second ESD element coupled to said DR element;

a peripheral circuit coupled to said second ESD element.

31. A circuit comprising:

a damascene; and

at least one of a low dielectric constant (K), (wherein said low K is less than 3.0), and a high K insulator (wherein said high K is greater than 3.5), coupled adjacent to said damascene resistor.

32. A means for providing resistor ballasting for over-voltage and electrostatic discharge protection (ESD) comprising at least one damascene resistor element in an ESD network.

33. A means for providing resistor ballasting and electrostatic discharge protection (ESD) comprising:

at least one damascene resistor (DR) resistor element; and

a peripheral circuit including at least one of a buffer network and a receiver network.

34. A resistor structure comprising:

a damascene filled trough; and

a thin conductive film coupled adjacent to at least one surface of said damascene filled trough.

35. The resistor structure according to claim 34, wherein said damascene filled trough comprises a silicon dioxide film.

36. The resistor structure according to claim 34, wherein said damascene filled trough comprises a low-K film.

37. A means for providing enhanced resistor ballasting comprising:

a damascene resistor wherein a resistance increases with self heating of said damascene resistor wherein R(T)=R_o(1+μ

T).