Gateway

• US 20030118039A1
• Filed: 12/12/2002
• Published: 06/26/2003
• Est. Priority Date: 12/17/2001
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Hikida, Koji, Nishi, Hidetaka, Yamada, Kenji
• Application Number:
  US10/317,552
• Publication Number:
  US 20030118039A1
• Time in Patent Office: Days
• US Class Current: 370/401
• CPC Class Codes: H04L 12/2856 Access arrangements, e.g. Internet access asynchronous transfer mode networks H04L12/5601; broadband local area networks H04L12/2801; optical access or distribution networks H04Q11/0067; access to open networks H04L12/5691; digital subscriber line end-user equipment and bit-level processing of data on a PSTN-based network H04M11/00; home network gateways H04L12/2834; wireless access networks H04W
• CPC Class Codes: H04L 12/2872 Termination of subscriber connections
• CPC Class Codes: H04L 61/00 Network arrangements, protocols or services for addressing or naming
• CPC Class Codes: H04L 61/10 of different types
• CPC Class Codes: H04L 65/103 in the network
• CPC Class Codes: H04L 65/104 in the network
• CPC Class Codes: H04L 65/1043 Gateway controllers, e.g. media gateway control protocol [MGCP] controllers
• CPC Class Codes: H04L 65/1101 Session protocols
• CPC Class Codes: H04M 7/125 Details of gateway equipment
• CPC Class Codes: H04Q 2213/13167 Redundant apparatus
• CPC Class Codes: H04Q 2213/13196 Connection circuit/link/trunk/junction, bridge, router, gateway
• CPC Class Codes: H04Q 2213/13389 LAN, internet
• CPC Class Codes: H04Q 3/0045 involving hybrid, i.e. a mixture of public and private, or multi-vendor systems
• CPC Class Codes: H04Q 3/54558 Redundancy, stand-by

Abstract

A gateway, for connecting an existing public switched telephone network (PSTN) and an Internet Protocol (IP) network, separating hardware into an interface unit with the PSTN, a processing unit having a conversion function between a PCM signal and IP packets, an IP interface unit, and a control unit for controlling the overall apparatus. By switching these hardware blocks to match with the type of the network and the type of the media, it becomes possible to achieve compatibility with various types of PSTNs and IP networks and various services such as VoIP and NAS/RAS. Also, a function block for enabling access to the duplex control units from a maintenance system or the like by a single MAC address and autonomously restoring the system from failure due to a software logic conflict and a function block for preventing file destruction are provided.

Claims

1. A gateway for connecting a public switched telephone network (PSTN) and an Internet Protocol (IP) network, comprising:

an interface unit with the PSTN,

an interface unit with the IP network,

a processing unit for media conversion between the PSTN and the IP network, and

a control unit for controlling the above,

all separated in different hardware blocks, where

the hardware blocks of the interface units or processing unit can be individually switched to blocks compatible to the type of the PSTN or IP network to be connected or the media service to be provided.

2. A gateway as set forth in claim 1, where duplex hardware blocks including said control units are provided, identical media access control (MAC) addresses are given to the duplex hardware blocks, and any one of the duplex hardware blocks can be accessed from a maintenance system by the identical MAC addresses.

3. A gateway as set forth in claim 1, provided with:

duplex hardware blocks of said control units,

a watchdog timer circuit for monitoring a software processing operation of a control unit provided in each of the duplex hardware blocks of the control units,

a means for notifying an occurrence of failure by a software processing unit of the failed side to the other side when that software processing unit can still run and by the watchdog timer circuit when that software processing unit can no longer run, and

a means for, in the control unit of the standby side receiving notification of the occurrence of failure from an active side, achieving autonomously a switch between sides, reinitializing the failed location, and reinstalling the duplex configuration.

4. A gateway as set forth in claim 2, provided with:

duplex hardware blocks of said control units,

a watchdog timer circuit for monitoring a software processing operation of the control unit provided in each of the duplex hardware blocks of control units,

a means for notifying an occurrence of failure by a software processing unit of the failed side to the other side when that software processing unit can still run and by the watchdog timer circuit when that software processing unit can no longer run, and

a means for, in the control unit of the standby side receiving notification of the occurrence of failure from an active side, achieving autonomously a switch between sides, reinitializing the failed location, and reinstalling the duplex configuration.

5. A gateway as set forth in claim 1, provided with:

a watchdog timer circuit for monitoring a software processing operation provided in said hardware block of the control unit, where the hardware block being a single configuration, and

a means for detecting failure by a software processing unit when that software processing unit can still run at the time of a failure and by the watchdog timer circuit when that software processing unit can no longer run, notifying the occurrence of that failure to a host apparatus, and reinitializing the failed location and reinstalling the hardware under the control of the host apparatus or by a reset circuit provided in the apparatus.

6. A gateway as set forth in claim 1, provided with:

a file system,

a file access indication register indicating, when a first function block has opened a file, to a second function block accessing the first function block that the file is open, and

a means for restricting access to the first function block which has opened the file when said file access indication register indicates the file is open.

7. A gateway as set forth in claim 2, provided with:

a file system,

a file access indication register indicating, when a first function block has opened a file, to a second function block accessing the first function block that the file is open, and

a means for restricting access to the first function block which has opened the file when said file access indication register indicates the file is open.

8. A gateway as set forth in claim 3, provided with:

a file system,

a file access indication register indicating, when a first function block has opened a file, to a second function block accessing the first function block that the file is open, and

a means for restricting access to the first function block which has opened the file when said file access indication register indicates the file is open.

9. A gateway as set forth in claim 4, provided with:

a file system,

a file access indication register indicating, when a first function block has opened a file, to a second function block accessing the first function block that the file is open, and

a means for restricting access to the first function block which has opened the file when said file access indication register indicates the file is open.

10. A gateway as set forth in claim 1, wherein further comprising a management table for allocating UDP/TCP port numbers of IP packets to lines of said PSTN in units of lines and managing correspondence between the UDP/TCP port numbers and card numbers of said processing unit, and said interface unit with the IP network refers to the management table and transfers IP packets from the IP network to said processing unit serving the line to which a UDP/TCP port number was allocated.

11. A gateway as set forth in claim 1, wherein a switching means is provided in said interface unit with the PSTN, and the switching means switches a PCM signal in units of time slots depending on the type of said processing unit, the type is determined by the number of lines serviced etc.

12. A gateway as set forth in claim 2, wherein further comprising a memory storing identical MAC addresses to be given to said duplex hardware blocks, the memory is mounted on a hardware, such as a backboard, accessible from the duplex hardware blocks, and the MAC addresses stored in the memory are read and set by the duplex hardware blocks.

13. A gateway as set forth in claim 2, wherein either of said duplex hardware blocks is used as a primary side, MAC addresses stored in a memory mounted in the primary side hardware block are read, and read MAC addresses are set in the secondary side hardware block.

14. A gateway as set forth in claim 2, wherein, when either of said duplex hardware blocks connected to an identical router or hub is connected to the network first via the router or hub, the MAC addresses written in the packets such as address resolution packets to be broadcast are read by said other hardware block, and the read MAC addresses are set as MAC addresses of that other hardware block.