Method of measuring the probability of failure caused only by defects, method of measuring defect limited yield, and system using the same
First Claim
1. A method of calculating a probability of failures (KR) caused only by defects in blocks in a wafer chip comprising:
- inspecting said blocks to detect defects in said blocks and in blocks located around said inspected blocks;
measuring the number of said inspected blocks having failures caused by a reason other than said defects in said inspected blocks located around said inspected blocks having said defects (n1);
measuring the number of said inspected blocks having no failures in said inspected blocks located around said inspected blocks having said defects (n2);
measuring the number of inspected blocks having failures caused by said defects in said inspected blocks having said defects (n3);
measuring the number of inspected blocks having no failures in said inspected blocks having said defects (n4); and
substituting data (n1) through (n4) in formula 1a
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Accused Products
Abstract
A method of calculating a probability of failures caused only by defects, a method of calculating a defect limited yield using the classification of pattern parameters extracted only from the defects, and a system for calculating the probability of failure and the defect limited yield are provided. In one exemplary embodiment for calculating a probability of failures caused only by defects, defects are detected in inspected blocks that have defects and in blocks located around the inspected blocks to measure the number of inspected blocks that have failures caused by reasons other than the defects in the blocks located around the inspected blocks having defects (n1), the number of inspected blocks having no failures in the blocks located around the inspected blocks having the defects (n2), the number of inspected blocks having failures caused by defects in the inspected blocks having defects (n3), and the number of inspected blocks having no failures in the inspected blocks having defects (n4). The data (n1) through (n4) is then substituted in the following formula:
where
and
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Citations
23 Claims
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1. A method of calculating a probability of failures (KR) caused only by defects in blocks in a wafer chip comprising:
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inspecting said blocks to detect defects in said blocks and in blocks located around said inspected blocks;
measuring the number of said inspected blocks having failures caused by a reason other than said defects in said inspected blocks located around said inspected blocks having said defects (n1);
measuring the number of said inspected blocks having no failures in said inspected blocks located around said inspected blocks having said defects (n2);
measuring the number of inspected blocks having failures caused by said defects in said inspected blocks having said defects (n3);
measuring the number of inspected blocks having no failures in said inspected blocks having said defects (n4); and
substituting data (n1) through (n4) in formula 1a - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of calculating a probability of failures caused only by defects in each chip of a wafer comprising the steps of:
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determining the total number of wafer chips (m1);
detecting defects in each said wafer chip determining the total number of chips having said defects (m2);
determining the total number of chips which fail due to a reason other than said defects (m3);
classifying said wafer chips having defects using probable parameters in consideration of area, size, and number of said defects;
determining the total number of wafer chips (m4) and the total number of wafer chips which fail (m5) when said wafer chips are classified according to each said probable parameter; and
calculating a probability (KR) that said wafer chips fail only due to said defects by substituting the data m1, m2, m3, m4, and m5 in the formula;
- View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. A method of calculating a defect limited yield (DLY) comprising:
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inspecting said blocks to detect defects in said blocks and in blocks located around said inspected blocks;
measuring the number of said inspected blocks having failures caused by a reason other than said defects in said inspected blocks located around said inspected blocks having said defects (n1);
measuring the number of said inspected blocks having no failures in said inspected blocks located around said inspected blocks having said defects (n2);
measuring the number of inspected blocks having failures caused by said defects in said inspected blocks having said defects (n3);
measuring the number of inspected blocks having no failures in said inspected blocks having said defects (n4);
substituting data (n1) through (n4) in formula 1a substituting KR into formula;
wherein i is 1 to k;
wherein k is the total number of wafer chips; and
wherein KR is the probability that wafer chips fail.
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15. A method of calculating a defect limited yield (DLY) comprising:
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determining the total number of wafer chips (m1);
detecting defects in each said wafer chip;
determining the total number of chips having said defects (m2);
determining the total number of chips which fail due to a reason other than said defects (m3);
classifying said wafer chips having defects using probable parameters in consideration of area, size, and number of said defects;
determining the total number of wafer chips (m4) and the total number of wafer chips which fail (m5) when said wafer chips are classified according to each said probable parameter;
calculating a probability (KR) that said wafer chips fail only due to said defects by substituting the data m1, m2, m3, m4, and m5 in the formula;
substituting KR into formula;
wherein i is 1 to k;
wherein k is the total number of wafer chips; and
wherein KR is the probability that wafer chips fail.
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16. A system for calculating a probability of failure caused by defects only in inspected blocks in a wafer chip comprising:
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a defect detector for detecting defects in said inspected blocks in said chip;
a controller for comparing data obtained by said defect detector and layout information of said inspected blocks; and
a display unit for displaying information from said controller so that a process performer can monitor said displayed information. - View Dependent Claims (17, 18)
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19. A system for calculating a probability of failure caused only by defects in wafer chips comprising:
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a defect detector for detecting defects in each of said wafer chips;
a controller for comparing data obtained by said defect detector and layout information of said wafer chips, said layout information being stored in advance; and
a display unit for displaying information from said controller so that a process performer can monitor said displayed information. - View Dependent Claims (20, 21)
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22. A post management system comprising:
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a defect detector for detecting defects in wafer chips;
a first storage for storing defect information obtained from said defect detector;
an EDS inspecting unit for inspecting whether cell regions are turned on or off;
a second storage for storing said on/off data obtained from said EDS inspecting unit; and
a controller for comparing data from said first storage and said second storage with layout information of said wafer chips and creating a decision tree. - View Dependent Claims (23)
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Specification