Deposition of tungsten for the formation of conformal tungsten silicide

• US 20030123216A1
• Filed: 12/27/2001
• Published: 07/03/2003
• Est. Priority Date: 12/27/2001
• Status: Abandoned Application

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Zhang, Hui, Xi, Ming, Mak, Alfred W., Jackson, Robert L., Yang, Michael X., Lai, Ken Kaung, Yoon, Hyungsuk A.
• Application Number:
  US10/033,545
• Publication Number:
  US 20030123216A1
• Time in Patent Office: Days
• US Class Current: 361/303
• CPC Class Codes: H01L 21/28562 Selective deposition
• CPC Class Codes: H01L 28/84 being a rough surface, e.g. using hemispherical grains
• CPC Class Codes: H01L 28/90 having vertical extensions
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/038 the capacitor being in a trench in the substrate

Abstract

A method and apparatus of depositing a tungsten film by cyclical deposition in the formation of tungsten silicide for use in capacitor structures is provided. One embodiment of forming an electrode for a capacitor structure comprises depositing a polysilicon layer over a structure and depositing a tungsten layer over the polysilicon layer by cyclical deposition. The tungsten layer is annealed to form a tungsten silicide layer from the polysilicon layer and the tungsten layer. The tungsten silicide layer acts as one electrode in the capacitor structure. In one aspect, the tungsten silicide layer may be used to form three-dimensional capacitor structures, such as trench capacitors, crown capacitors, and other types of capacitors. In another aspect, the tungsten silicide layer may be used to form capacitor structures which comprise a hemi-spherical silicon grain layer or a rough polysilicon layer.

Claims

1. A method of forming an electrode for a three-dimensional capacitor structure, comprising:

depositing a polysilicon layer over a structure;

depositing a tungsten layer over the polysilicon layer by cyclical deposition; and

annealing the tungsten layer to form a tungsten silicide layer from the polysilicon layer and the tungsten layer.

2. The method of claim 1, wherein annealing the tungsten layer comprises partially consuming the polysilicon layer.

3. The method of claim 1, wherein annealing the tungsten layer comprises entirely consuming the polysilicon layer.

4. The method of claim 1, wherein the tungsten layer is deposited to a thickness between about 50 Å

and about 200 Å

.

5. The method of claim 1, wherein the tungsten layer is deposited over an aperture having an opening of about 0.15 μ

m or less.

6. The method of claim 1, wherein the tungsten layer is deposited over an aperture having an aspect ratio of about 15:

1 or more.

7. The method of claim 6, wherein the tungsten layer is deposited over an aperture having an aspect ratio of about 20:

1 or more.

8. The method of claim 7, wherein the tungsten layer is deposited over an aperture having an aspect ratio of about 40:

1 or more.

9. The method of claim 1, wherein the structure is a crown structure.

10. The method of claim 1, wherein the structure is a trench structure.

11. A method of forming a capacitor structure, comprising:

forming a rough polysilicon surface;

depositing a high dielectric constant material layer over the rough polysilicon surface;

depositing a polysilicon layer over the high dielectric constant material layer;

depositing a tungsten layer over the polysilicon layer by cyclical deposition; and

annealing the tungsten layer to form a tungsten silicide layer from the polysilicon layer and the tungsten layer.

12. The method of claim 11, wherein annealing the tungsten layer comprises partially consuming the polysilicon layer.

13. The method of claim 11, wherein annealing the tungsten layer comprises entirely consuming the polysilicon layer.

14. The method of claim 11, wherein the tungsten layer is deposited to a thickness between about 50 Å

and about 200 Å

.

15. The method of claim 11, wherein the tungsten layer is deposited over an aperture having an opening of about 0.15 μ

m or less.

16. The method of claim 11, wherein the tungsten layer is deposited over an aperture having an aspect ratio of about 15:

1 or more.

17. The method of claim 16, wherein the tungsten layer is deposited over an aperture having an aspect ratio of about 20:

1 or more.

18. The method of claim 17, wherein the tungsten layer is deposited over an aperture having an aspect ratio of about 40:

1 or more.

19. The method of claim 11, wherein the capacitor structure comprises a crown structure.

20. The method of claim 11, wherein the structure is a trench structure.

21. A three-dimensional capacitor, comprising:

a conformal tungsten silicide layer formed over a structure having an opening of about 0.15 μ

m or less.

22. The capacitor of claim 21, wherein the structure has an aspect ratio of about 15:

1 or more.

23. The capacitor of claim 22, wherein the structure has an aspect ratio of about 20:

1 or more.

24. The capacitor of claim 23, wherein the structure has an aspect ratio of about 40:

1 or more.

25. The capacitor of claim 21, wherein the structure comprises a dielectric layer.

26. The capacitor of claim 25, wherein the dielectric layer comprises a high dielectric constant material layer.

27. The capacitor of claim 25, wherein the structure further comprises a rough polysilicon layer, the dielectric layer being formed over the rough polysilicon layer.

28. The capacitor of claim 25, further comprising a polysilicon layer between the dielectric layer and the tungsten silicide layer.

29. The capacitor of claim 21, wherein the three-dimensional capacitor comprises a trench capacitor.

30. A three-dimensional capacitor, comprising:

a rough polysilicon layer;

a high dielectric constant material layer formed over the rough polysilicon layer; and

a conformal tungsten silicide layer formed over the high dielectric constant material layer.

31. The capacitor of claim 30, further comprising a polysilicon layer between the high dielectric constant material layer and the tungsten silicide layer.

32. The capacitor of claim 30, wherein the three-dimensional capacitor comprises a crown capacitor.

33. The capacitor of claim 30, wherein the three-dimensional capacitor comprises a trench capacitor.

34. A system for processing a substrate, comprising:

a first chamber adapted to deposit a polysilicon layer;

a second chamber adapted to deposit a tungsten layer by cyclical deposition over the polysilicon layer; and

a third chamber adapted to anneal the tungsten layer.

35. The system of claim 34, wherein the third chamber is adapted to anneal the tungsten layer to form a tungsten silicide layer.

36. The system of claim 35, further comprising a fourth chamber adapted to deposit a polysilicon layer over the tungsten silicide layer.

37. The system of claim 35, wherein the first chamber is further adapted to deposit a second polysilicon layer over the tungsten silicide layer.