System simulation using dynamic step size and iterative model

• US 20030125914A1
• Filed: 12/20/2002
• Published: 07/03/2003
• Est. Priority Date: 12/28/2001
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Du, Tan
• Application Number:
  US10/326,693
• Publication Number:
  US 20030125914A1
• Time in Patent Office: Days
• US Class Current: 703/2
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

Disclosed are methods, systems, and algorithms for simulating a system, such as a circuit, using an iterative model. Standard step response data is used for modeling the system and providing simulation results. Disclosed are simulation engines employing dynamically adjusted sample sizes and event scheduling. Also disclosed is the use of an approximation of the first order derivative of the simulation input to obtain the expected error for use in dynamically adjusting the step size. The use of an approximation of the second order derivative of the simulation input is also disclosed. The use of embodiments of the simulation engine with particular iterative models is described.

Claims