Method and apparatus for controlling a supply voltage to a processor

• US 20030126477A1
• Filed: 12/28/2001
• Published: 07/03/2003
• Est. Priority Date: 12/28/2001
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Nguyen, Don J., Lenehan, Daniel J., Zhang, Kevin X.
• Application Number:
  US10/040,505
• Publication Number:
  US 20030126477A1
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3243 Power saving in microcontroller unit
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

In accordance with an embodiment of the present invention, a processor may receive a supply voltage provided by an external voltage regulator. The processor may include a voltage sensor, the output of which may be a control signal to indicate if the supply voltage is above or below a target value. This target value may be adjusted by the processor in accordance with a power management policy. The control signal may be provided to the external voltage regulator to adjust the supply voltage accordingly.

Claims

1. A processor comprising:

a first port to receive a supply voltage from an external voltage regulator, the supply voltage to power the processor;

a voltage sensor to monitor the supply voltage; and

a second port to provide a control signal from the voltage sensor to the voltage regulator to indicate if the supply voltage is above or below a target value.

2. The processor of claim 1, wherein the target value is adjustable by the processor in accordance with a power management policy.

3. The processor of claim 1, wherein the target value is to be set to allow the processor to meet a timing requirement.

4. The processor of claim 1, wherein the target value is to be reduced if the circuit is inactive.

5. The processor of claim 1, wherein the voltage sensor includes an op amp.

6. The processor of claim 1, wherein the circuit includes at least a portion of a core of the processor.

7. The processor of claim 1, wherein the circuit includes a memory region.

8. The processor of claim 7, wherein the memory region is a cache.

9. A computer system comprising:

a discrete voltage regulator to provide a supply voltage; and

a processor, powered by the supply voltage, to provide a control signal to the voltage regulator to indicate a target value for the supply voltage.

10. The computer system of claim 9, wherein the target value is to be adjusted by the processor in accordance with a power management policy.

11. The computer system of claim 9, wherein the target value is to be set to allow the processor to meet a timing requirement.

12. The computer system of claim 9, wherein the target value is to be reduced if at least a portion of the processor is inactive.

13. The computer system of claim 9, wherein the target value is to be indicated by the control signal by indicating if the supply voltage is above or below the target value.

14. The computer system of claim 9, wherein the processor includes a voltage sensor to monitor the supply voltage and to provide the control signal, the voltage sensor including an op amp.

15. A method comprising:

enabling a voltage regulator to provide Vcc to a processor;

enabling the processor to receive Vcc from the voltage regulator and to send a control signal associated with Vcc to the voltage regulator, the control signal to indicate a target value; and

enabling the voltage regulator to receive the control signal from the processor, the voltage regulator to adjust Vcc to the target value in response to the control signal.

16. The method of claim 15, wherein enabling the voltage regulator to provide Vcc to the processor includes electrically coupling a Vcc output of the voltage regulator to a Vcc input of the processor.

17. The method of claim 15, wherein enabling the voltage regulator to receive the control signal from the processor includes electrically coupling a Vcc control output of the processor to a Vcc control input of the voltage regulator.

18. The method of claim 15, further comprising reducing the target value if at least a portion of the processor is inactive.