Air gaps copper interconnect structure

• US 20030127740A1
• Filed: 01/15/2003
• Published: 07/10/2003
• Est. Priority Date: 09/28/2001
• Status: Active Grant

• Current Assignee: Sharp Laboratories of America Incorporated (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Laboratories of America Incorporated (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Hsu, Sheng Teng, Pan, Wei
• Granted Patent: US 6,841,844 B2
• Time in Patent Office: Days
• US Class Current: 257/758
• CPC Class Codes: H01L 21/76811 involving multiple stacked pre-patterned masks
• CPC Class Codes: H01L 21/76813 involving a partial via etch
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An inter-level insulator structure is provided having an effective insulator dielectric constant approaching 1. An embodiment of the inter-level insulator comprises a first metal layer comprising a first plurality of metal lines; a second metal layer comprising a second plurality of metal lines, and at least one via connected to the first metal layer; and an air gap interposed between the first metal layer and the second metal layer. In one embodiment, the air gap is also present between metal lines on either metal layer, such that air gaps act as intra-level as well as inter-level insulators. A method is also provided to deposit and pattern a sacrificial polymer, and form metal layers. The sacrificial polymer is capable of being decomposed to become air gaps during annealing.

Claims

1. An inter-level insulator structure comprising:

a) a first metal layer comprising a first plurality of metal lines;

b) a second metal layer comprising a second plurality of metal lines, and at least one via connected to the first metal layer; and

c) an air gap interposed between the first metal layer and the second metal layer.

2. The inter-level insulator structure of claim 1, further comprising an air gap interposed between adjacent metal lines comprising the first metal layer.

3. The inter-level insulator structure of claim 1, wherein the first metal layer comprises a barrier metal and copper.

4. The inter-level insulator structure of claim 1, further comprising an oxide layer at least partially underlying the first metal layer.

5. The inter-level insulator structure of claim 1, further comprising an oxide layer at least partially underlying the second metal layer.

6. The inter-level insulator structure of claim 1, wherein a first portion of the metal lines comprising the first metal lines and a second portion of the metal lines comprising the second metal layer form an edge shielding structure.

7. The inter-level insulator structure of claim 6, wherein a plurality of edge shielding structures extend along the periphery of a device, whereby additional mechanical support is provided.

9. The method of claim 7, wherein the first metal layer comprises copper.

10. The method of claim 7, wherein the double layer hard mask comprises a layer of silicon dioxide followed by a layer of silicon nitride.

11. The method of claim 7, wherein the double layer hard mask comprises a layer of silicon nitride followed by a layer of silicon dioxide.

12. The method of claim 7, wherein the step of depositing the first sacrificial layer further comprises spin coating.

13. The method of claim 7, wherein the first sacrificial layer comprises a sacrificial polymer.

14. The method of claim 12, wherein the sacrificial polymer comprises a copolymer of butylnorbornene and triethoxysilyl norbornene.

15. The method of claim 12, wherein the sacrificial polymer comprises a copolymer of butylnorbornene and triethoxysilyl norbornene dissolved as a 6-12 wt % solution in mesitylene.

16. The method of claim 12, wherein the sacrificial polymer comprises Unity™

sacrificial polymer.

17. The method of claim 12, wherein the sacrificial polymer comprises Unity™

sacrificial polymer dissolved as a 6-12 wt % solution in mesitylene.

18. The method of claim 7, wherein the etch stop comprises silicon dioxide.

19. The method of claim 7, wherein the second sacrificial layer comprises a sacrificial polymer.

8. A method of forming an inter-level insulator structure comprising the steps of:

a) providing a first metal layer overlying a substrate;

b) depositing a first sacrificial layer overlying the first metal layer;

c) depositing an etch stop overlying the first metal layer;

d) depositing a second sacrificial layer overlying the etch stop;

e) forming a double layer hard mask overlying the second sacrificial layer;

f) patterning the double layer hard mask to produce a via mask and a trench mask;

g) etching the second sacrificial layer to form a partial via down to the etch stop;

h) etching an exposed portion of the etch stop;

i) etching the first sacrificial layer to form a via, whereby the first metal layer is exposed;

j) etching the second sacrificial layer to form a trench;

k) depositing a barrier metal and copper;

l) planarizing the barrier metal and copper to form a second metal layer; and

m) decomposing the first and second sacrificial layer, whereby the first sacrificial layer and the second sacrificial layer are replaced by air gaps.