Packet communication apparatus and controlling method thereof

• US 20030128712A1
• Filed: 04/17/2002
• Published: 07/10/2003
• Est. Priority Date: 01/09/2002
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Moriwaki, Norihiko, Masukawa, Hirofumi
• Granted Patent: US 7,221,647 B2
• Time in Patent Office: Days
• US Class Current: 370/412
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/5652 Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
• CPC Class Codes: H04L 2012/5679 Arbitration or scheduling
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 47/50 Queue scheduling
• CPC Class Codes: H04L 47/6205 Arrangements for avoiding head of line blocking
• CPC Class Codes: H04L 49/1576 Crossbar or matrix
• CPC Class Codes: H04L 49/608 ATM switches adapted to switch variable length packets, e.g. IP packets

Abstract

Disclosed is a packet communication apparatus of large capacity capable of realizing high throughput and packet priority control in packet switching for changing connection of input and output ports of a switch on a variable-length packet unit basis. A variable-length packet is divided into a group of cells in an ingress interface, and the cells are stored in VOQs divided in correspondence with destination output ports of a switch. For each of the VOQs, a corresponding first-cell storing register is provided. When a packet arrives at the head of the VOQ, the first cell indicating an output path of the packet is transferred to a first-cell storing register. Each ingress interface selects one of first cells of packets which can be output and transmits the selected one to the switch. The switch performs a scheduling process so as to select one first cell per output port. The ingress interface to which output permission is given by the scheduling process is connected to a desired output port, and continuously outputs the first cell and the subsequent cells stored in the VOQs to the output port on a packet unit basis.

Claims

1. A packet communication apparatus comprising:

an ingress interface for inputting plural packet data;

a switch for switching paths of the packet data, having a plurality of input ports, a plurality of output ports, and a scheduler; and

an egress interface for transmitting said packet data transferred through said switched path,

said ingress interface having a plurality of ingress buffers for storing said plural packet data, a plurality of storing units corresponding to the plurality of ingress buffers, and a buffer control unit for controlling said ingress buffers and storing units, and each of said input ports having a port buffer,

wherein when said packet data arrives at the head of the ingress buffer, a data portion including destination information in said packet data is transferred to said storing unit, said port buffer stores said data portion which is output from said storing unit and, when output of said data portion to a predetermined output port is not permitted by said scheduler, said port buffer discards said data portion, receives said data portion retransmitted from said storing unit in response to an output request sent again from said buffer control unit and determines whether to transfer said data portion to said predetermined output port in accordance with an instruction of said scheduler.

2. The packet communication apparatus according to claim 1, wherein said buffer control unit selects one of a plurality of data portions included in said plurality of storing units, copies the one from said storing unit, and outputs the one to said port buffer.

3. The packet communication apparatus according to claim 1, wherein when said scheduler permits output of said data portion to said predetermined output port, said data portion and said packet data subsequent to said data portion are transferred to said predetermined output port via a switched path.

4. The packet communication apparatus according to claim 1, wherein said ingress interface has selectors of the same number as that of said ingress buffers, and

said selector selects either said packet data portion other than said data portion of said ingress buffer or said data portion in said storing unit corresponding to said ingress buffer and outputs the selected one to the switch.

5. The packet communication apparatus according to claim 4, wherein said ingress buffer stores a plurality of cells of said packet data in a string format,

said packet data includes a first cell, a subsequent cell and a last cell, said data portion is said first cell or said packet data including said first cell, said switch has counters corresponding to said output ports, said data portion is passed via a path switched by said switch and monitored at said output port, and the total value of cells of said packet data is stored in said counter.

6. The packet communication apparatus according to claim 5, wherein each time said subsequent cell is monitored at said output port for the total value, said total value is decremented and, when said counter value becomes equal to or lower than a predetermined value, release of said output port is notified to said buffer control unit.

7. The packet communication apparatus according to claim 1, wherein said ingress interface is provided with a high-priority ingress buffer, a storing unit, a low-priority ingress buffer, and a storing unit, and when said plurality of cells stored in said ingress buffer and storing unit are transferred, priorities are assigned.

8. The packet communication apparatus according to claim 6, wherein said cell has a cell header and cell data, said cell header of said subsequent cell has an available port bit, said output port monitors the status of the available port bit and when said output port detects the change of the status of the available port bit, said buffer control unit is notified of said release.

9. The packet communication apparatus according to claim 8, wherein said output port can request said buffer control unit to transmit the next packet data before said last cell passes.

10. The packet communication apparatus according to claim 1, wherein said buffer control unit includes a timer monitoring unit and a receiving unit for receiving an acknowledge signal from said switch and after said data portion is transmitted from said storing unit, through monitoring by said timer monitoring unit whether said acknowledge signal is received or not within the predetermined period of time, said buffer control unit determines whether or not said scheduler permits the output of said data portion to the predetermined output port.

11. The packet communication apparatus according to claim 4, wherein said buffer control unit has a receiving unit for receiving an acknowledge signal from said switch and when said receiving unit detects that the output of said data portion is permitted, said buffer control unit selects said packet data portion other than said data portion of said ingress buffers and when said receiving unit detects that the output of said data portion is not permitted, said buffer control unit selects any of said data portion of the plurality of said storing units and transmits one data portion to said switch.

12. A packet data transfer controlling method using a packet communication apparatus having:

an ingress interface for inputting plural packet data;

a switch for switching paths of the packet data, having a plurality of input ports, a plurality of output ports, and a scheduler; and

an egress interface for transmitting said packet data transferred via said switched path,

said ingress interface having a plurality of first storing units, a plurality of second storing units corresponding to the plurality of first storing units, and a control unit for controlling said first and second storing units, and said plurality of input ports having the corresponding plurality of third storing units,

said method comprising the steps of;

storing said packet data in said first storing unit and transferring a data portion including destination information of said packet data to said second storing unit;

receiving said data portion output from said second storing unit by said third storing unit, selecting said data portion by said scheduler, and outputting said selected data portion to a predetermined output port; and

when said data portion is not selected for said predetermined output port by said scheduler, discarding said data portion by said third storing unit and, in response to an output request further issued from said control unit, transmitting said data portion to said third storing unit by one of said plurality of second storing units.

13. The packet data transfer controlling method according to claim 12, wherein said packet data includes a first cell, a subsequent cell and a last cell, said first storing unit is an input queue buffer for storing said packet data, said second storing unit is a storing buffer for storing said data portion including said first cell, and said third storing unit is a port buffer for storing said data portion including said first cell.

14. The packet data transfer controlling method according to claim 12, wherein in said step of transmitting, when said data portion is not selected by said scheduler, said third storing unit discards said data portion, and said control unit selects one of said plurality of second storing units and outputs said data portion, and said control unit determines again whether or not said data portion is able to be transmitted to said predetermined output port by said scheduler.