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Dynamic power control in integrated circuits

  • US 20030131268A1
  • Filed: 12/19/2002
  • Published: 07/10/2003
  • Est. Priority Date: 12/20/2001
  • Status: Active Grant
First Claim
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1. A method for dynamic power control in an electronic system implemented on an integrated circuit, which electronic system comprises at least one or several hardware units, a hardware based power control logic substantially implemented with logic circuits, as well as a programmable power control mode register containing information about powered-down modes defined for said one or more hardware units, in which method a single hardware unit transmits, by means of a hardware-unit-specific level-sensitive status signal, information about its activity to the power control logic, a power control mode register transmits, by means of a hardware-unit-specific level-sensitive requirement signal, information to the power control logic about the powered-down mode defined for a single hardware unit by programming, wherein the power control logic combines said status signal and said requirement signal and, on the basis of this, transfers said hardware unit from the operational mode to the powered-down mode or vice versa, by influencing the clock frequency to be supplied to said hardware unit, wherein to transfer a single hardware unit from the powered-down mode to the operational mode, said hardware unit transmits to the power control logic a first level-sensitive status signal for transferring said hardware unit from the powered-down mode to the wake up mode, and further a second level-sensitive status signal for transferring said hardware unit from the wake up mode to the actual operational mode.

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