Apparatus and method for fault-tolerant control using fully distributed common memory
First Claim
1. An apparatus for fault-tolerant control, which fixes errors by transferring system functions from an active processor module performing the system functions to a standby processor module when the errors are detected in the active processor module, each of the processor modules comprising:
- an A-port memory and a B-port memory which store memory data of their own processor module (the self processor module) or memory data of the other processor module; and
a memory bus switch which performs switching-over to selectively store data of the self processor module or data transmitted from the other processor module in the A-port or B-port memory, depending on whether the self processor module or the other processor module has memory ownership.
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Abstract
A control system, which is capable of performing a fault-tolerant function realized in the manner of duplication by merely transferring memory ownership from one processor module to another with the use of a method of extending a memory bus, is provided. Each processor module in the control system includes an A-port memory and a B-port memory which store memory data of their own processor module (the self processor module) or memory data of the other processor module and a memory bus switch which performs switching-over to selectively store data of the self processor module or data transmitted from the other processor module in the A-port or B-port memory, depending on whether the self processor module or the other processor module has memory ownership.
13 Citations
11 Claims
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1. An apparatus for fault-tolerant control, which fixes errors by transferring system functions from an active processor module performing the system functions to a standby processor module when the errors are detected in the active processor module, each of the processor modules comprising:
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an A-port memory and a B-port memory which store memory data of their own processor module (the self processor module) or memory data of the other processor module; and
a memory bus switch which performs switching-over to selectively store data of the self processor module or data transmitted from the other processor module in the A-port or B-port memory, depending on whether the self processor module or the other processor module has memory ownership. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An apparatus for fault-tolerant control, which fixes errors by transferring system functions from an active processor module performing the system functions to a standby processor module when the errors are detected in the active processor module, each of the processor modules comprising:
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an A-port memory and a B-port memory which store memory data of their own processor module (the self processor module) and memory data of the other processor module;
a data transmission channel matching unit which connects the processor modules so as to maintain the consistency of data in the processor modules; and
a non-block crossbar switch for switching signals to their respective memories which generates a control signal depending on the result of an operation mode negotiation between the processor modules to determine a fault-tolerant operational state, and switches into the A-port memory or the B-port memory according to the control signal to provide a path for receiving/transmitting a control signal, an address, and data from/to the memory matching unit, depending on the operation mode. - View Dependent Claims (10)
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11. A method for fault-tolerant control using memories in an apparatus for fault-tolerant control, which fixes errors by transferring system functions from an active processor module performing the system functions to a standby processor module when the errors are detected in the active processor module, each of the processor modules comprising an A-port memory and a B-port memory which store memory data of the self processor module and memory data of the other processor module, the method comprising:
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generating a control signal depending on the result of an operational mode negotiation between the processor modules and thus determining a fault-tolerant operational state; and
performing switching-over to selectively store the data of the self processor module or the data transmitted from the other processor module in the A-port or B-port memory, depending on whether the self processor module or the other processor module has memory ownership, wherein when signals input from a memory controller of the self processor module are called memory signals, and signals input from the other processor module are called channel signals, the memory signals are output to a memory, the ownership of which belongs to the self-processor module, and channel signals are output to the other memory, the ownership of which belongs to the other processor module.
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Specification