Semiconductor device and method for fabricating the same
First Claim
1. A semiconductor device comprising:
- a semiconductor layer including;
a channel region;
a source region and a drain region sandwiching the channel region; and
a body region connected to the channel region and being adjacent to the source region and the drain region;
a gate electrode formed above the channel region interposing a gate insulation film therebetween;
a dummy electrode formed above the body region near an interface between the drain region and the body region, and electrically insulated with the gate electrode; and
a body contact region formed in the body region except a region where the dummy electrode is formed.
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Abstract
The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.
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Citations
26 Claims
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1. A semiconductor device comprising:
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a semiconductor layer including;
a channel region;
a source region and a drain region sandwiching the channel region; and
a body region connected to the channel region and being adjacent to the source region and the drain region;
a gate electrode formed above the channel region interposing a gate insulation film therebetween;
a dummy electrode formed above the body region near an interface between the drain region and the body region, and electrically insulated with the gate electrode; and
a body contact region formed in the body region except a region where the dummy electrode is formed. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor device comprising:
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a semiconductor layer including;
a channel region;
a source region and a drain region sandwiching the channel region; and
a body region connected to the channel region and being adjacent to the source region and the drain region;
a gate electrode formed above the channel region interposing a gate insulation film therebetween;
a dummy electrode formed above the body region near an interface between the drain region and the body region, being integral with the gate electrode, and formed in a comb-shaped; and
a body contact region formed in the body region except a region where the dummy electrode is formed. - View Dependent Claims (8)
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7. A semiconductor device comprising:
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a semiconductor layer including;
a channel region;
a source region and a drain region sandwiching the channel region; and
a body region connected to the channel region and being adjacent to the source region and the drain region;
a gate electrode formed above the channel region interposing a gate insulation film therebetween;
a dummy electrode formed above the body region near an interface between the drain region and the body region, being integral with the gate electrode, and formed in a pattern having the inside cut out; and
a body contact region formed in the body region except a region where the dummy electrode is formed. - View Dependent Claims (9)
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10. A semiconductor device comprising:
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a semiconductor layer including;
a channel region;
a source region and a drain region sandwiching the channel region; and
a body region connected to the channel region and being adjacent to the source region and the drain region;
a gate electrode formed above the channel region interposing a gate insulation film therebetween;
a dummy electrode formed above the body region near an interface between the drain region and the body region, and being integral with the gate electrode; and
a body contact region formed in the body region except a region where the dummy electrode is formed, a capacitance per a unit area of a capacitor formed by the dummy electrode being smaller than a capacitance per the unit area of a capacitor formed by the gate electrode.
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11. A semiconductor device comprising:
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a semiconductor layer including;
a channel region;
a source region and a drain region sandwiching the channel region;
a body contact region; and
a lead-out region interconnecting the channel region and the body contact region;
a device isolation film formed, surrounding the bordering edge of the semiconductor layer;
a gate electrode formed above the channel region interposing a gate insulation film therebetween; and
a first sidewall insulation film formed on a side wall of the gate electrode, a width of the lead-out region being smaller than a sum of a width of the gate electrode and a width of the first sidewall insulation film formed on both sides of the gate electrode, and the lead-out region being covered by the gate electrode and the first sidewall insulation film. - View Dependent Claims (12, 13)
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14. A method for fabricating a semiconductor device comprising the steps of:
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forming on a first conduction type substrate a device isolation film for defining a device region including a first region and a second region adjacent to the first region;
forming above the device region a conducting film interposing a gate insulation film therebetween;
patterning the conducting film to form a gate electrode in the first region and a dummy electrode in the second region near the interface between the first region and the second region, the dummy electrode being electrically insulated with the gate electrode;
doping an impurity having a second conduction type different from the first conduction type in the first region with the gate electrode as a mask to form source/drain regions in the first region on both sides of the gate electrode; and
doping an impurity having the first conduction type in the second region with the dummy electrode as a mask to form a body contact region in the second region. - View Dependent Claims (15, 16)
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17. A method for fabricating a semiconductor device comprising the steps of:
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forming on a first conduction type substrate a device isolation film for defining a device region including a first region and a second region adjacent to the first region;
depositing and patterning a first conducting film to form a gate electrode of the first conducting film above the first region;
depositing and patterning a second conducting film to form a dummy electrode of the second conducting film above the second region near the interface between the first region and the second region;
doping an impurity having a second conduction type different from the first conduction type in the first region with the gate electrode as a mask to form source/drain regions in the first region on both sides of the gate electrode; and
doping an impurity having the first conduction type in the second region with the dummy electrode as a mask to form a body contact region in the second region.
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18. A method for fabricating a semiconductor device comprising the steps of:
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forming on a first conduction type substrate a device isolation film for defining a device region including a first region and a second region adjacent to the first region;
forming a conducting film above the device region interposing a gate insulation film therebetween;
patterning the conducting film to form a gate electrode in the first region and a comb-shaped dummy electrode in the second region near the interface between the first region and the second region, the dummy electrode being formed integral with the gate electrode;
doping an impurity having a second conduction type different form the first conduction type in the first region with the gate electrode as a mask to form source/drain regions in the first region on both sides of the gate electrode;
doping an impurity having the first conduction type in the second region with the dummy electrode as a mask to form a body contact region in the second region. - View Dependent Claims (20)
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19. A method for fabricating a semiconductor device comprising the steps of:
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forming on a first conduction type substrate a device isolation film for defining a device region including a first region and a second region adjacent to the first region;
forming a conducting film above the device region interposing a gate insulation film therebetween;
patterning the conducting film to form a gate electrode on the first region and a dummy electrode formed in a pattern having the inside cut out, formed on the second region near the interface between the first region and the second region, the dummy electrode being formed integral with the gate electrode;
doping an impurity having a second conduction type different from the first conduction type in the first region with the gate electrode as a mask to form source/drain regions in the first region on both sides of the gate electrode; and
doping an impurity having the first conduction type in the second region with the dummy electrode as a mask to form a body contact region in the second region. - View Dependent Claims (21)
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22. A method for fabricating a semiconductor device comprising the steps of:
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forming a device isolation film for defining a device region on a first conduction type substrate;
forming a gate electrode above the device region interposing a gate insulation film therebetween;
forming in the device region on both sides of the gate electrode a first impurity diffused region having a second conduction type different from the first conduction type, spaced from the device isolation film;
forming a first sidewall insulation film on the side wall of the gate electrode;
doping an impurity having the second conduction type in the device region with the gate electrode and the first sidewall insulation film as a mask to form a second impurity diffused region of the second conduction type which is deeper than the first impurity diffused region in the device region on both sides of the gate electrode. - View Dependent Claims (23, 24, 25, 26)
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Specification