Magnetic shield for integrated circuit packaging

• US 20030132494A1
• Filed: 01/15/2002
• Published: 07/17/2003
• Est. Priority Date: 01/15/2002
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Tuttle, Mark E., Deak, James G.
• Granted Patent: US 6,906,396 B2
• Time in Patent Office: Days
• US Class Current: 257/433
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15184 in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/1815 Shape
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: Y10S 257/921 : Radiation hardened semiconductor device

Abstract

Structures and methods for providing magnetic shielding for integrated circuits are disclosed. The shielding comprises a foil or sheet of magnetically permeable material applied to an outer surface of a molded (e.g., epoxy) integrated circuit package. The foil can be held in place by adhesive or by mechanical means. The thickness of the shielding can be tailored to a customer'"'"'s specific needs, and can be applied after all high temperature processing, such that a degaussed shield can be provided despite use of strong magnetic fields during high temperature processing, which fields are employed to maintain pinned magnetic layers within the integrated circuit.

Claims

1. A housing for protecting an integrated circuit device comprising:

a molded body encapsulating the integrated circuit device; and

at least one magnetically permeable foil applied to an outer surface of the molded body.

2. The housing of claim 1, wherein the integrated circuit device comprises at least one magnetic thin film.

3. The housing of claim 1, wherein the molded body comprises an organic material.

4. The housing of claim 3, wherein the organic material comprises an epoxy mold compound.

5. The housing of claim 1, wherein the molded body encapsulates the integrated circuit device on a plastic substrate.

6. The housing of claim 5, wherein the plastic substrate comprises a ball grid array substrate.

7. The housing of claim 5, wherein wire bonds extend between the device and electrically conductive traces on the plastic substrate.

8. The housing of claim 5, wherein solder bumps on the device are in contact with electrical traces on the plastic substrate.

9. The housing of claim 1, further comprising electrical leads protruding from the molded body.

10. The housing of claim 9, wherein the electrical leads comprise conductive traces on a plastic substrate.

11. The housing of claim 1, wherein the integrated circuit device comprises a plurality of integrated circuit dies.

12. The housing of claim 1, wherein the magnetically permeable foil applied to the outer surface of the molded body is approximately parallel to a major surface of the integrated circuit device.

13. The housing of claim 1, further comprising a layer of adhesive between the outer surface of the molded body and the at least one magnetically permeable foil.

14. The housing of claim 1, wherein at least one outer surface of the molded body comprises a recess designed to receive the magnetically permeable foil.

15. The housing of claim 14, wherein the at least one outer surface of the molded body further comprises an overhang along at least a portion of a perimeter of the recess, the overhang providing a mechanical means to hold the magnetically permeable foil within the recess.

16. The housing of claim 15, wherein the overhang comprises at least one sloped tab protruding into the recess.

17. The housing of claim 1, wherein the magnetically permeable foil is selected from the group consisting of nickel-iron based alloys, cobalt-iron based alloys, nickel-cobalt based alloys, and amorphous ferromagnetics.

18. The housing of claim 1, wherein the magnetically permeable foil has a thickness between about 1 μ

m and 1000 μ

m.

19. A method of magnetically shielding a semiconductor die, comprising:

forming a molded housing around the semiconductor die; and

applying a film of magnetic shield material to at least one outer surface of the molded housing, the film being approximately parallel to a major surface of the semiconductor die.

20. The method of claim 19, wherein forming a molded housing comprises encapsulating a plurality of semiconductor dies.

21. The method of claim 19, wherein the at least one outer surface of the molded housing comprises a recessed region, into which region the film of magnetic shield material is applied.

22. The method of claim 21, wherein applying comprises fitting the film within the recessed region under an overhang along at least a portion of a perimeter of the recessed region.

23. The method of claim 19, wherein applying the film of magnetic shield material to at least one outer surface of the molded housing comprises applying the film to both a top outer surface and a bottom outer surface of the molded housing.

24. The method of claim 19, wherein the semiconductor die is attached to a plastic substrate before the molded housing is formed, and the molded housing encapsulates the semiconductor die on the plastic substrate.

25. The method of claim 24, wherein the plastic substrate comprises a ball grid array substrate.

26. The method of claim 24, further comprising bonding wires between the semiconductor die and electrical traces on the plastic substrate after the semiconductor die is attached to the plastic substrate and before forming the molded housing.

27. The method of claim 24, further comprising bonding solder bumps on the semiconductor die to electrical traces on the plastic substrate before forming the molded housing.

28. The method of claim 19, wherein applying the film of magnetic shield material to at least one outer surface of the molded housing comprises attaching the film to the molded housing with an epoxy-based adhesive.

29. The method of claim 19, wherein the magnetic shield material is selected from the group consisting of mu metal and permalloy.

30. The method of claim 19, wherein applying the film of magnetic shield material is conducted after all high temperature processing.

31. The method of claim 19, further comprising degaussing the film of magnetic shield material before applying the film to the at least one outer surface of the molded housing.

32. The method of claim 31, further comprising removing the film of magnetic material from the outer surface of the molded housing before degaussing and re-applying the film.

33. An integrated circuit package, comprising:

an integrated circuit die;

a molded body encapsulating the die; and

a magnetic shield layer extending over an outer surface of the molded body and parallel to a major surface of the die, the magnetic shield layer being electrically insulated from the die.

34. The integrated circuit package of claim 33, wherein the magnetic shield layer is mechanically trapped within a molded recess on an outer surface of the molded body.

35. A method of packaging an integrated circuit chip, comprising:

mounting the chip on a die carrier;

molding epoxy over the chip to form an encapsulant;

selecting a magnetic shield layer for a desired integrated circuit environment; and

applying the selected magnetic shield layer over the encapsulant.

36. The method of claim 35, further comprising forming a recess in a major surface of the encapsulant, wherein applying comprises fitting the selected magnetic shield layer within the recess.

37. The method of claim 36, further comprising removing the selected magnetic shield layer from the recess, conducting high temperature processing upon the packaged chip while the magnetic shield layer is removed, and replacing the magnetic shield layer after high temperature processing.

38. The method of claim 37, further comprising applying a strong magnetic field to the packaged chip during the high temperature processing.

39. The method of claim 35, wherein applying comprises adhering.

40. An integrated circuit package comprising an encapsulant surrounding an integrated circuit die, the encapsulant including a recess on an outer surface thereof, and the recess configured for receiving and mechanically retaining a magnetic shield foil.

41. The integrated circuit package of claim 40, wherein the encapsulant comprises overhanging tabs protruding into the recess for removably trapping the foil within the recess.