Asymmetric comparator for low power applications

• US 20030132786A1
• Filed: 01/17/2002
• Published: 07/17/2003
• Est. Priority Date: 01/17/2002
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Styduhar, Mark S.
• Granted Patent: US 7,049,857 B2
• Time in Patent Office: Days
• US Class Current: 327/66
• CPC Class Codes: H03K 3/3565 Bistables with hysteresis, e.g. Schmitt trigger
• CPC Class Codes: H03K 5/082 with an adaptive threshold
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

A method and structure for comparing an input signal to a reference signal using a comparator comprises a circuit for setting a trip point of a rising edge of an input signal according to a value of an external voltage reference; and at least two transistors, in the circuit, for setting a trip point of a falling edge of an input signal, according to a width-to-length ratio of the at least two transistors. Moreover, the at least two transistors comprises a first transistor of length (Lx) and a width of (W_x); and a second transistor of length (L_y) and a width of (W_y), wherein the width-to-length ratio equals (W_xL_y)/(W_yL_x). The trip point of a falling edge of an input signal increases (decreases) by increasing (decreasing) the width-to-length ratio.

Claims

1. A comparator comprising:

a circuit for setting a trip point of a rising edge of an input signal according to a value of an external voltage reference; and

at least two transistors, in said circuit, for setting a trip point of a falling edge of said input signal according to a width-to-length ratio of said at least two transistors.

2. The comparator of claim 1, wherein said comparator cycles between an analog circuit and a digital circuit.

3. The comparator of claim 2, wherein in said analog circuit, one of said at least two transistors is a tail current source transistor, and wherein said input signal rises from ground toward a positive power supply voltage, wherein said rise in said input signal switches said tail current source transistor on.

4. The comparator of claim 3, further comprising a plurality of transmission gates in said circuit, wherein said rise in said input signal causes said comparator to appear as a differential pair in an open loop configuration.

5. The comparator of claim 2, wherein in said digital circuit, said input signal is at an input voltage greater than said external reference voltage.

6. The comparator of claim 5, further comprising a plurality of transmission gates in said circuit, wherein said input signal causes said comparator to appear as an asymmetric inverting Schmitt trigger.

7. The comparator of claim 1, wherein said at least two transistors comprises:

a first transistor of length (L_x) and a width of (W_x); and

a second transistor of length (L_y) and a width of (W_y),

wherein said width-to-length ratio equals (W_xL_y)/(W_yL_x), and

wherein as said input signal decreases, a switching threshold becomes dependent on said width-to-length ratio.

8. The comparator of claim 7, wherein said trip point of a falling edge of an input signal decreases by decreasing said width-to-length ratio.

9. The comparator of claim 7, wherein said trip point of a falling edge of an input signal increases by increasing said width-to-length ratio.

10. A comparator comprising:

a circuit for setting a trip point of a rising edge of an input signal according to a value of an external voltage reference; and

at least two transistors, in said circuit, for setting a trip point of a falling edge of the input signal according to a width-to-length ratio of said at least two transistors,

wherein said comparator cycles between an analog circuit and a digital circuit,

wherein said trip point of a falling edge of an input signal decreases by decreasing said width-to-length ratio, and

wherein said trip point of a falling edge of an input signal increases by increasing said width-to-length ratio.

11. The comparator in claim 10, wherein said at least two transistors comprises:

a first transistor of length (L_x) and a width of (W_x); and

a second transistor of length (L_y) and a width of (W_y),

wherein said width-to-length ratio equals (W_xL_y)/(W_yL_x), and

wherein as said input signal decreases, a switching threshold becomes dependent on said width-to-length ratio.

12. The comparator of claim 10, wherein said analog circuit further comprises a tail current source transistor, and wherein said input signal rises from ground toward a positive power supply voltage, wherein said rise in said input signal switches said tail current source transistor on.

13. The comparator of claim 12, further comprising a plurality of transmission gates in said circuit, wherein said rise in said input signal causes said comparator to appear as a differential pair in an open loop configuration.

14. The comparator of claim 10, wherein in said digital circuit, said input signal is an input voltage greater than said external reference voltage.

15. The comparator of claim 14, further comprising a plurality of transmission gates in said circuit, wherein said input signal causes said comparator to appear as an asymmetric inverting Schmitt trigger.

16. A comparator for controlling a trip point of a rising and falling edge of an external input signal comprising a first portion operatively connected to a second portion, wherein said comparator cycles between an analog circuit and a digital circuit.

17. The comparator of claim 16, wherein said analog circuit comprises:

an input signal source inputting an input signal;

an output signal source;

a power supply voltage source;

an external input signal source;

a tail current source transistor operatively connected to said power supply voltage source;

a first pair of transistors operatively connected to said tail current source transistor, said input signal source, and said external input signal source;

a second pair of transistors operatively connected to said first pair of transistors; and

a plurality of invertors operatively connected to said output signal source, said first pair of transistors, and said second pair of transistors.

18. The comparator of claim 16, wherein said digital circuit comprises:

an input signal source inputting an input signal;

an output signal source;

a power supply voltage source;

a tail current source transistor operatively connected to said power supply voltage source and said input signal source;

a first pair of transistors operatively connected to said tail current source transistor and said input signal source;

a current mirror load transistor operatively connected to said input signal source and said first pair of transistors; and

a plurality of invertors operatively connected to said output signal source, said first pair of transistors, and said current mirror load transistor.

19. The comparator of claim 17, wherein in said analog circuit, said input signal rises from ground toward a positive power supply voltage, wherein said rise in said input signal switches said tail current source transistor on.

20. The comparator of claim 18, wherein in said digital circuit, said input signal is an input voltage greater than said external reference voltage.