Integrated magnetic field strap for signal isolator

• US 20030132826A1
• Filed: 01/15/2002
• Published: 07/17/2003
• Est. Priority Date: 01/15/2002
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Wan, Hong
• Granted Patent: US 7,046,117 B2
• Time in Patent Office: Days
• US Class Current: 338/32R
• CPC Class Codes: B82Y 25/00 Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
• CPC Class Codes: G01R 33/093 using multilayer structures, e.g. giant magnetoresistance sensors thin magnetic films H01F10/00
• CPC Class Codes: G01R 33/096 anisotropic magnetoresistance sensors
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00 MRAM devices H10B61/00

Abstract

An integrated signal isolator is provided to isolate first and second circuits. First, second, third, and fourth magnetoresistors of the isolator are coupled together so as to form a Wheatstone bridge. The first second, third, and fourth magnetoresistors are arranged so that the Wheatstone bridge is immune to uniform external magnetic fields having any direction. An input strap generates magnetic fields across the first, second, third and fourth magnetoresistors in response to a signal from the first circuit so that the Wheatstone bridge provides an output to the second circuit that is commensurate with the signal from the first circuit.

Claims

1. An integrated signal isolator having first and second ends, wherein the integrated signal isolator comprises:

first and second isolator input terminals;

first and second isolator output terminals;

first and second power supply terminals;

first, second, third, and fourth magnetoresistors, wherein the first and second magnetoresistors are coupled to the first isolator output terminal, wherein the second and third magnetoresistors are coupled to the first supply terminal, wherein the third and fourth magnetoresistors are coupled to the second isolator output terminal, and wherein the first and fourth magnetoresistors are coupled to the second supply terminal; and

,

an input strap having at least one turn coupled between the first and second isolator input terminals, wherein the input strap is disposed with respect to the first, second, third, and fourth magnetoresistors so that a magnetic field is generated over two of the magnetoresistors in one direction, so that a magnetic field is generated over the other two of the magnetoresistors in an opposite direction, and so that, when input current flows between the first and second isolator input terminals, a resistance of the first magnetoresistor tracks a resistance of the third magnetoresistor, and a resistance of the second magnetoresistor tracks a resistance of the fourth magnetoresistor.

2. The integrated signal isolator of claim 1 wherein the at least one turn of the input strap is disposed with respect to the first, second, third, and fourth magnetoresistors so that, when input current flows between the first and second isolator input terminals, a first field is generated across the set/reset direction and two of the first, second, third, and fourth magnetoresistors and a second field is generated across the other two of the first, second, third, and fourth magnetoresistors and so that the first and second fields point in substantially opposite directions thereby producing an output across the first and second isolator output terminals commensurate with the input current.

3. The integrated signal isolator of claim 1 wherein the input strap includes a plurality of turns.

4. The integrated signal isolator of claim 3 wherein each of the first, second, third, and fourth magnetoresistors comprises a serpentine structure having a plurality of elongated magnetoresistive portions coupled end-to-end, wherein the elongated portions of two of the magnetoresistors are position near and in parallel to a first elongated portion of each of the turns of the input strap, wherein the elongated portions of the other two magnetoresistors are position near and in parallel to a second elongated portion of each of the turns of the input strap, and wherein the first elongated portions of the turns of the input strap are parallel to the second elongated portions of the turns of the input strap.

5. The integrated signal isolator of claim 3 wherein each of the first, second, third, and fourth magnetoresistors comprises a serpentine structure having a plurality of elongated magnetoresistive portions coupled end-to-end, wherein the elongated portions of the first and second magnetoresistors are position near and in parallel to a first elongated portion of each of the turns of the input strap, wherein the elongated portions of the third and fourth magnetoresistors are position near and in parallel to a second elongated portion of each of the turns of the input strap, and wherein the first elongated portions of the turns of the input strap are parallel to the second elongated portions of the turns of the input strap.

6. The integrated signal isolator of claim 1 wherein the first, second, third, and fourth magnetoresistors are in a first layer, wherein the input strap is in a second layer, and wherein the first and second layers are separate layers.

7. The integrated signal isolator of claim 6 further comprising a dielectric between the input strap and the first, second, third, and fourth mnagnetoresistors.

8. The integrated signal isolator of claim 7 wherein the dielectric is a first dielectric, wherein the integrated signal isolator further comprises a second dielectric over the input strap, and wherein the first, second, third, and fourth magnetoresistors are formed over a substrate and under the first dielectric.

9. The integrated signal isolator of claim 1 further comprising a set-reset coil having a plurality of clockwise turns and a plurality of counterclockwise turns, wherein each clockwise turn of the set-reset coil has a portion running across the first and fourth magnetoresistors, wherein each counterclockwise turn of the set-reset coil has a portion running across the second and third magnetoresistors, and wherein the clockwise and counterclockwise turns are arranged so that current supplied to the set-reset coil flows through the portions of each of the clockwise and counterclockwise turns in the same direction.

10. The integrated signal isolator of claim 1 further comprising a set-reset coil having a plurality of turns disposed with respect to the first, second, third, and fourth magnetoresistors so that the set-reset coil generates a magnetic field across the first, second, third, and fourth magnetoresistors in the same direction.

11. An integrated signal isolator having first and second ends, wherein the integrated signal isolator comprises:

first, second, third, and fourth magnetoresistors, wherein the first and second magnetoresistors are coupled to a first isolator output terminal, wherein the second and third magnetoresistors are coupled to a first supply terminal, wherein the third and fourth magnetoresistors are coupled to a second isolator output terminal, and wherein the first and fourth magnetoresistors are coupled to a second supply terminal; and

,

an input strap having at least one turn coupled between first and second isolator input terminals, wherein the least one turn has a first portion running alongside two of the magnetoresistors and a second portion running alongside the other two magnetoresistors, wherein the at least one turn is arranged so that current supplied to the input strap flows through the first portion in a first direction between the first and second ends and through the second portion in a second direction between the first and second ends, and wherein the first and second directions are substantially opposite to one another.

12. The integrated signal isolator of claim 11 wherein the input strap includes a plurality of turns.

13. The integrated signal isolator of claim 11 wherein the first, second, third, and fourth magnetoresistors are in a first layer, wherein the input strap is in a second layer, and wherein the first and second layers are separate layers.

14. The integrated signal isolator of claim 11 further comprising a dielectric between the input strap and the first, second, third, and fourth magnetoresistors.

15. The integrated signal isolator of claim 14 wherein the dielectric is a first dielectric, wherein the integrated signal isolator further comprises a second dielectric over the input strap, and wherein the first, second, third, and fourth magnetoresistors are formed over a substrate and under the input strap.

16. The integrated signal isolator of claim 11 further comprising a set-reset coil having a plurality of clockwise turns and a plurality of counterclockwise turns, wherein each clockwise turn of the set-reset coil has a portion running across the first and fourth magnetoresistors, wherein each counterclockwise turn of the set-reset coil has a portion running across the second and third magnetoresistors, and wherein the clockwise and counterclockwise turns are arranged so that current supplied to the set-reset coil flows through the portions of each of the clockwise and counterclockwise turns in the same direction.

17. The integrated signal isolator of claim. 11 further comprising a set-reset coil having a plurality of turns disposed with respect to the first, second, third, and fourth magnetoresistors so that the set-reset coil generates a magnetic field across the first, second, third, and fourth magnetoresistors in the same direction.

18. A method of isolating first and second circuits comprising:

generating a first field across at least one magnetically responsive element, wherein the first field is generated in response to an isolator input signal from the first circuit;

generating a second field across at least another magnetically responsive element, wherein the second field is generated in response to the isolator input signal from the first circuit, and wherein the first and second fields are substantially opposite to one another in direction; and

,

supplying an isolator output signal to the second circuit, wherein the isolator output signal is derived across the at least two magnetically responsive elements, and wherein the first and second fields are generated so that the isolator output signal is responsive to the isolator input signal that generates the first and second fields but not to an external field.

19. The method of claim 18 wherein the first field is generated across the first and second magnetically responsive elements and the second field is generated across third and fourth magnetically responsive elements, wherein the first and second magnetically responsive elements are coupled to a first isolator output terminal, wherein the second and third magnetically responsive elements are coupled to a first supply terminal, wherein the third and fourth magnetically responsive elements are coupled to a second isolator output terminal, and wherein the first and fourth magnetically responsive elements are coupled to a second supply terminal.

20. The method of claim 18 wherein the first field is generated across the first and third magnetically responsive resistors and the second field is generated across second and fourth magnetically responsive resistors, wherein the first and second magnetically responsive elements are coupled to a first isolator output terminal, wherein the second and third magnetically responsive elements are coupled to a first supply terminal, wherein the third and fourth magnetically responsive elements are coupled to a second isolator output terminal, and wherein the first and fourth magnetically responsive elements are coupled to a second supply terminal.

21. The method of claim 18 wherein the first field is generated across the first and fourth magnetically responsive resistors and the second field is generated across second and third magnetically responsive resistors, wherein the first and second magnetically responsive elements are coupled to a first isolator output terminal, wherein the second and third magnetically responsive elements are coupled to a first supply terminal, wherein the third and fourth magnetically responsive elements are coupled to a second isolator output terminal, and wherein the first and fourth magnetically responsive elements are coupled to a second supply terminal.

22. The method of claim 18 further comprising setting the magnetic moments of the at least two magnetically responsive elements in the same direction.

23. The method of claim 22 wherein the moment direction is substantially perpendicular to the first and second fields.

24. The method of claim 23 wherein the setting of the magnetic moments is momentary.

25. The method of claim 24 wherein the setting of the magnetic moments comprises setting the magnetic moments prior to generating the first and second fields.

26. A method of making an integrated signal isolator having first and second ends comprising:

forming first, second, third, and fourth magnetoresistors in a first layer of an integrated structure so that the first and second magnetoresistors are substantially aligned along a first axis, so that the third and fourth magnetoresistors are substantially aligned along a second axis, and so that the first axis is offset from and parallel to the second axis;

coupling the first and second magnetoresistors to a first isolator output terminal;

coupling the second and third magnetoresistors to a first supply terminal;

coupling the third and fourth magnetoresistors to a second isolator output terminal;

coupling the first and fourth magnetoresistors to a second supply terminal;

forming an input strap in a second layer of the integrated structure so that the input strap, when receiving an input, generates a field across two of the first, second, third, and fourth magnetoresistors and an opposing field across the other two of the first, second, third, and fourth magnetoresistors; and

,

coupling the input strap between first and second isolator input terminals.

27. The method of claim 26 wherein the each of the first, second, third, and fourth magnetoresistors comprises a corresponding serpentine structure.

28. The method of claim 26 further comprising forming a dielectric between the input strap and the first, second, third, and fourth magnetoresistors.

29. The method of claim 26 further comprising forming a set-reset coil in a third layer of the integrated structure.

30. The method of claim 29 wherein the second layer is between the first and third layers.