Synchronous rectifier circuit capable of working as a high-efficiency DC/DC converter

• US 20030133313A1
• Filed: 12/27/2002
• Published: 07/17/2003
• Est. Priority Date: 12/28/2001
• Status: Abandoned Application

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Criscione, Marcello
• Application Number:
  US10/331,155
• Publication Number:
  US 20030133313A1
• Time in Patent Office: Days
• US Class Current: 363/21.06
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A synchronous rectifier circuit operates as a high-efficiency DC/DC converter for mixed step-up/step-down applications, and includes an input terminal receiving a voltage signal, a second input terminal node connected to an external inductor, and an output terminal. A power switch may be connected between the second input terminal node and the output terminal to generate on its output a voltage at one terminal of the inductor. A driver circuit is provided for driving the power switch, and a comparator senses the potential difference between the output and input terminals and produces an enable signal for the driver circuit. The comparator may be a wide pass-band comparator forcing prompt triggering of the regulation loop in the rectifier.

Claims

1. A synchronous rectifier circuit (30) working as a high-efficiency DC/DC converter for mixed step-up/step-down applications, the circuit having a regulating loop structure and comprising:

an input terminal (IN) receiving a voltage signal (Vin), a second input terminal node (X) connected to an external inductor (L), and an output terminal (OUT);

a power switch (Q7) connected between said terminal node (X) and said output terminal (OUT) to convert on its output a voltage (Vlx) presented at one end of said inductor (L);

a driver circuit (15) for driving the power switch (Q7), and a comparator (25) sensing the potential difference between the output and input terminals (OUT,IN) and to produce an enable signal for the driver circuit (15);

characterised in that;

said comparator (25) is a wide pass-band comparator forcing prompt triggering of the regulation loop in the rectifier.

2. A circuit according to claim 1, characterised in that the driver circuit (5) comprises a pair of transistors (Q5,Q6) in a diode configuration, said transistors being connected each to a corresponding conduction terminal of the power switch (Q7) to sense the potential difference between the conduction terminals of the switch (Q7).

3. A circuit according to claim 1, characterised in that the comparator (25) enables the driver circuit (15) when the potential (Vlx) at the second input node (X) is higher than the potential (Vout) at the output terminal (OUT), as in the step-up mode the input voltage (Vin) is lower than the output voltage (Vout), or when the potential (Vlx) at the second input node (X) is lower than the potential (Vin) at the input terminal (IN), as in the step-down mode the input voltage (Vin) is higher than the output voltage (Vout).

4. A circuit according to claim 1, characterised in that the power switch (Q7) is a bipolar power transistor of the PNP type.

5. A circuit according to claim 1, characterised in that the comparator (25) comprises common-base bipolar transistors.

6. A circuit according to claim 2, characterised in that the driver circuit (15) further comprises a transistor (Q4) connected between the control terminal of the power switch (Q7) and a reference potential (GND), and receives on the base terminal an output signal from the comparator (25).

7. A circuit according to claim 6, characterised in that an additional transistor (Q8) is connected, in a diode configuration, between the base terminal of said transistor (Q4) and said reference potential (GND), said additional transistor being adapted to limit the voltage attained at the base of the driver transistor (Q4) of the power switch on the falling edge of the waveform on the second input node (X), thereby to avoid reverse conduction phenomena.

8. A circuit according to claim 6, characterised in that a capacitor (C2) is connected between said base terminal and the second input node (X) to stabilize the feedback loop and to inject additional current in said base as the rectifier is turned on, thereby to speed up turning on the driver transistor (Q4) of the power switch (Q7).