Flash memory data access method and configuration

• US 20030135688A1
• Filed: 04/08/2002
• Published: 07/17/2003
• Est. Priority Date: 01/11/2002
• Status: Active Grant

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Simpletech, Inc. (Western Digital Corporation)
• Inventors: Wu, Chien-Hung, Tai, Shih-Chieh
• Granted Patent: US 7,035,993 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A flash memory configuration and access method having a particular conversion method that uses the page or the sector in each flash memory block instead of the block that is commonly used as the base of the data conversion storage to store data. When data is written into the physical flash block of the flash memory, the original logic sector information can be preserved. The data is written into the same block of the flash memory in a manner according to the sequence as it is received instead of the sequence of the logic sector. Therefore, the block position does not move to refresh the block content until the physical block is full. Consequently, the number of times to move the physical block of the flash memory can be reduced to increase the lifetime of the flash memory. Moreover, since the number of times to erase is reduced, so that the writing speed can speed up to improve the operation efficiency.

Claims

1. A flash memory data access method, suitable for data access between a host and a flash memory, wherein the host sequentially accesses data by using a plurality of logic elements stored in a logic portion, and the flash memory has a physical portion, wherein the physical portion comprises a plurality of physical elements to store data, wherein the method comprises:

providing a unit management device, used to provide a conversion configuration, comprising a first conversion table and a second conversion table, wherein the first conversion table is used to store a virtual element corresponding to each of the logic elements and a virtual unit where the virtual element is located, wherein the second conversion table is used to store a physical element of the physical portion corresponding to each of the virtual elements and a physical unit of the physical portion corresponding to each of the virtual units, the physical unit comprises a plurality of the physical elements;

the host sequentially accessing data from the logic elements, wherein the first conversion table is referenced to convert each of the logic elements to the corresponding virtual element and the virtual unit where the virtual element is located; and

corresponding to the virtual unit, referring to the second conversion table to convert each of the virtual units to the corresponding physical unit, and to convert the virtual element to the corresponding physical element, wherein the physical elements and the physical units that are converted via the logic elements by the unit management device are sequentially accessed according to the sequence in the physical portion.

2. The flash memory data access method of claim 1, wherein the logic element is a logic sector, the virtual element is a virtual sector, and the physical element is a physical sector.

3. The flash memory data access method of claim 2, wherein the logic sector is a protocol between the host and the flash memory prescribed by a LBA mode of the ATA protocol.

4. The flash memory data access method of claim 2, wherein the sequence of the physical portion used to access data is the sequence of the physical sectors in the flash memory and the sequence of the physical units in the flash memory, that is the data are sequentially accessed from the LSB (Least Significant Bit) physical sector in the flash memory to the MSB (Most Significant Bit) physical sector in the flash memory, and from the LSB (Least Significant Bit) physical unit in the flash memory to the MSB (Most Significant Bit) physical unit in the flash memory.

5. A flash memory configuration, suitable for a host and a flash memory device,

wherein the host comprises an ATA command set and a flash memory interface,

wherein the host sequentially accesses data by using a plurality of logic elements stored in a logic portion, the flash memory has a physical portion,

wherein the physical portion comprises a plurality of physical elements to store data, the flash memory configuration comprising:

a unit management device, located in between the ATA command set and the flash memory interface, used to provide a data access conversion device between the host and the flash memory device, wherein the unit management device comprises;

a first conversion table, used to store a virtual element corresponding to each of the logic elements and a virtual unit where the virtual element is located; and

a second conversion table, used to store a physical element of the physical portion corresponding to each of the virtual elements and a physical unit of the physical portion corresponding to each of the virtual units, the physical unit comprises a plurality of the physical elements, wherein;

when the host sequentially accesses data from the logic elements, the first conversion table is used to convert each of the logic elements to the corresponding virtual element and the virtual unit where the virtual element locates, and the second conversion table is used to convert each of the virtual units to the corresponding physical unit, and to convert the virtual element to the corresponding physical element, wherein the physical elements and the physical units that are converted via the logic elements by the unit management device are sequentially accessed according to the sequence in the physical portion.

6. The flash memory configuration of claim 5, wherein the logic element is a logic sector, the virtual element is a virtual sector, and the physical element is a physical sector.

7. The flash memory configuration of claim 6, wherein the logic sector is a protocol between the host and the flash memory prescribed by a LBA mode of the ATA protocol.

8. The flash memory configuration of claim 6, wherein the sequence of the physical portion used to access data is the sequence of the physical sectors in the flash memory and the sequence of the physical units in the flash memory, that is the data are sequentially accessed from the LSB (Least Significant Bit) physical sector in the flash memory to the MSB (Most Significant Bit) physical sector in the flash memory, and from the LSB (Least Significant Bit) physical unit in the flash memory to the MSB (Most Significant Bit) physical unit in the flash memory.

9. A flash memory data access method, suitable for data access between a host and a flash memory, wherein the host sequentially accesses data by using a plurality of logic elements stored in a logic portion, the flash memory has a physical portion, wherein the physical portion comprises a plurality of physical elements to store data, wherein the method comprises:

providing a first conversion table and a second conversion table, wherein the first conversion table is used to store a virtual element corresponding to each of the logic elements and a virtual unit where the virtual element is located, wherein the second conversion table is used to store a physical element of the physical portion corresponding to each of the virtual elements and a physical unit of the physical portion corresponding to each of the virtual units, the physical unit comprises a plurality of the physical elements;

sequentially accessing data from the logic elements, wherein the first conversion table is referenced to convert each of the logic elements to the corresponding virtual element and the virtual unit where the virtual element is located; and

corresponding to the virtual unit, referring to the second conversion table to convert each of the virtual unit to the corresponding physical unit, and to convert the virtual element to the corresponding physical element, wherein the physical elements and the physical units that are converted via the logic elements by the unit management device are sequentially accessed according to the sequence in the physical portion.

10. The flash memory data access method of claim 9, wherein the logic element is a logic sector, the virtual element is a virtual sector, and the physical element is a physical sector.

11. The flash memory data access method of claim 10, wherein the logic sector is a protocol between the host and the flash memory prescribed by a LBA mode of the ATA protocol.

12. The flash memory data access method of claim 10, wherein the sequence of the physical portion used to access data is the sequence of the physical sectors in the flash memory and the sequence of the physical units in the flash memory, that is the data are sequentially accessed from the LSB (Least Significant Bit) physical sector in the flash memory to the MSB (Most Significant Bit) physical sector in the flash memory, and from the LSB (Least Significant Bit) physical unit in the flash memory to the MSB (Most Significant Bit) physical unit in the flash memory.