Body contact mosfet
First Claim
1. A silicon-on-insulator semiconductor device comprising a source, a drain, a first gate having a first thickness, and a body contact formed in a substantially coplanar semiconducting substrate, wherein said source and said drain are separated from said body contact by an insulator, said insulator not forming a part of said gate.
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Accused Products
Abstract
A body contact structure utilizing an insulating structure between the body contact portion of the active area and the transistor portion of the active area is disclosed. In one embodiment, the present invention substitutes an insulator for at least a portion of the gate layer in the regions between the transistor and the body contact. In another embodiment, a portion of the gate layer is removed and replaced with an insulative layer in regions between the transistor and the body contact. In still another embodiment, the insulative structure is formed by forming multiple layers of gate dielectric between the gate and the body in regions between the transistor and the body contact. The body contact produced by these methods adds no significant gate capacitance to the gate.
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Citations
20 Claims
- 1. A silicon-on-insulator semiconductor device comprising a source, a drain, a first gate having a first thickness, and a body contact formed in a substantially coplanar semiconducting substrate, wherein said source and said drain are separated from said body contact by an insulator, said insulator not forming a part of said gate.
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12. A method for making a body contact in a silicon-on-insulator transistor, said method comprising the steps of:
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placing a shallow trench isolation on a substrate between regions of an SOI layer;
depositing a gate conductor over a portion of said substrate;
applying a first dummy gate mask over a first portion of said gate conductor;
etching said gate conductor such that said gate conductor not comprising said first portion of said gate conductor is removed;
depositing an insulator on said substrate;
polishing said insulator;
applying a second gate mask over a second portion of said gate conductor;
etching said gate conductor such that said gate conductor not comprising said second portion of said gate conductor is removed;
depositing spacer portions on said substrate such that said spacer portions isolate said second portion of said gate conductor and said insulator from the rest of said transistor;
depositing charged implants in said substrate. - View Dependent Claims (13, 14)
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- 15. A method of reducing capacitance in a silicon-on-insulator transistor, said transistor having a source region, a drain region, a body-contact region, and a gate connecting said source region to said drain region, said method comprising the step of isolating said body-contact region from said source region and said drain region.
Specification