Bootstrap circuit in DC/DC static converters

• US 20030151447A1
• Filed: 01/06/2003
• Published: 08/14/2003
• Est. Priority Date: 07/25/2000
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Adragna, Claudio, Moriconi, Ugo
• Granted Patent: US 6,798,269 B2
• Time in Patent Office: Days
• US Class Current: 327/536
• CPC Class Codes: H02M 3/155 using semiconductor devices only
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A bootstrap circuit in DC/DC static converters is provided that includes a power transistor having a first non drivable terminal coupled with a first input voltage and driving means connected with a drivable terminal of the power transistor and adapted for determining the on time and the off time of the power transistor for each prefixed switching time period. The bootstrap circuit includes a capacitor coupled respectively with the second non drivable terminal of the power transistor and with a second input voltage and an input of the driving means so that the voltage between its terminals is substantially equal to the voltage between the second non drivable terminal and the drivable terminal during the off time of the power transistor. The bootstrap circuit includes an overcharge circuit arranged between the second non drivable terminal and ground; the overcharge circuit is able to allow overcharging the capacitor during the off time of the power transistor and for a time period lower than the off time.

Claims

1. A bootstrap circuit in a DC/DC static converter including a power transistor having a first non drivable terminal coupled with a first input voltage;

and driving means connected with a drivable terminal of the power transistor and adapted for determining the on time and the off time of the power transistor for each prefixed switching time period, the bootstrap circuit comprising;

a capacitor coupled respectively with a second non drivable terminal of the power transistor and with a second input voltage and an input of the driving means so that the voltage between its terminals is substantially equal to the voltage between the second non drivable terminal and the drivable terminal during the off time of the power transistor; and

an overcharge circuit arranged between the second non drivable terminal and a reference voltage, the overcharge circuit being able to allow overcharging the capacitor during the off the of the power transistor for a time period lower than the off time.

2. The bootstrap circuit in a DC/DC static converter according to claim 1, wherein the overcharge circuit comprises a series coupling of a resistor and a further transistor.

3. The bootstrap circuit in a DC/DC static converter according to claim 2, wherein the further transistor is a bipolar transistor.

4. The bootstrap circuit in a DC/DC static converter according to claim 2, wherein the transistor is a MOSFET transistor and the resistor is the on resistance of the MOSFET.

5. The bootstrap circuit in a DC/DC static converter according to claim 1, wherein the time period for overcharging the capacitor occurs close to the end of the off time.

6. The bootstrap circuit in a DC/DC static converter according to claim 1, wherein the capacitor is coupled with the second input voltage by a diode and is connected directly with the second non-drivable terminal of the power transistor.

7. The bootstrap circuit in a DC/DC static converter according to claim 2, wherein the driving means comprising another transistor which is controlled by an external PWM signal and which is adapted for determining the turning off of the power transistor.

8. The bootstrap circuit in a DC/DC static converter according to claim 7, wherein the further transistor of the overcharge circuit is controlled by a further external signal synchronized with the external PWM signal in order to determine the turning on of the further transistor for the time period for overcharging the capacitor which is lower than the off time.

9. The bootstrap circuit in a DC/DC static converter according to claim 2, wherein the first resistor has a value included in a range from 10 to 100 Ohm.

10. The bootstrap circuit in a DC/DC static converter according to claim 1, wherein the power transistor is a DMOS transistor, the first non-drivable terminal being the drain terminal of the DMOS transistor, the second non-drivable terminal being the source terminal of the DMOS transistor and the drivable terminal being the gate terminal of the DMOS transistor.

11. The bootstrap circuit in a DC/DC static converter according to claim 1, wherein the converter comprises an inductance connected between the second non drivable terminal of the power transistor and an output terminal of the converter, a freewheeling diode connected between the non drivable terminal of the power transistor and ground which is adapted for demagnetising the inductance during the off time of the power transistor, the time period for overcharging the capacitor occurring after the period time for demagnetising the inductance.

12. The bootstrap circuit in a DC/DC static converter according to claim 1, wherein the reference voltage is ground.

13. A device including at least one bootstrap circuit in a DC/DC static converter including a power transistor having a first non drivable terminal coupled with a first input voltage;

and driving means connected with a drivable terminal of the power transistor and adapted for determining the on time and the off time of the power transistor for each prefixed switching time period, the bootstrap circuit comprising;

a capacitor coupled respectively with a second non drivable terminal of the power transistor and with a second input voltage and an input of the driving means so that the voltage between its terminals is substantially equal to the voltage between the second non drivable terminal and the drivable terminal during the off time of the power transistor; and

an overcharge circuit arranged between the second non drivable terminal and a reference voltage, the overcharge circuit being able to allow overcharging the capacitor during the off time of the power transistor for a time period lower than the off time.

14. The device according to claim 13, wherein the overcharge circuit comprises a series coupling of a resistor and a further transistor.

15. The device according to claim 14, wherein the further transistor is a bipolar transistor.

16. The device according to claim 14, wherein the transistor is a MOSFET transistor and the resistor is the on resistance of the MOSFET.

17. The device according to claim 13, wherein the tune period for overcharging the capacitor occurs close to the end of the off time.

18. The device according to claim 13, wherein the capacitor is coupled with the second input voltage by a diode and is connected directly with the second non-drivable terminal of the power transistor.

19. The device according to claim 14, wherein the driving means comprising another transistor which is controlled by an external PWM signal and which is adapted for determining the turning off of the power transistor.