Display driver circuit, display panel, display device, and display drive method

• US 20030156104A1
• Filed: 01/30/2003
• Published: 08/21/2003
• Est. Priority Date: 02/14/2002
• Status: Active Grant

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Morita, Akira
• Granted Patent: US 7,068,292 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2320/0276 for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/325 the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A signal driver IC (or a display driver circuit in a broad sense) includes a signal electrode driver circuit which drives a signal electrode by using grayscale data. The signal electrode driver circuit has a precharge circuit, a DAC circuit, and a drive voltage adjusting circuit. The precharge circuit sets an output electrode connected to the signal electrode at a precharge voltage in a first stage which is a first period within one horizontal scanning period. In a second stage subsequent to the first stage, the DAC circuit sets the output electrode at a reference voltage based on the grayscale data. In a third stage subsequent to the second stage, the drive voltage adjusting circuit adjusts the voltage of the output electrode by using the grayscale data.

Claims

1. A display driver circuit for driving a signal electrode based on grayscale data of (a+b) bits (a and b are positive integers), the display driver circuit comprising:

a precharge circuit which sets an output electrode electrically connected to the signal electrode at a precharge voltage in a first period within a drive period;

a voltage select circuit which sets the output electrode which has been set at the precharge voltage at a reference voltage based on the grayscale data; and

a drive voltage adjusting circuit which adjusts a voltage of the output electrode by using the grayscale data, the output voltage having been set at the reference voltage.

2. The display driver circuit as defined in claim 1,

wherein the voltage select circuit sets the output electrode at the reference voltage based on high order “

a”

bit(s) in the grayscale data of (a+b) bits.

3. The display driver circuit as defined in claim 1, wherein:

the drive voltage adjusting circuit includes a first transistor and a second transistor;

a source terminal and a drain terminal of the first transistor are respectively connected to a first power supply line to which a first power supply voltage is supplied and the output electrode;

a source terminal and a drain terminal of the second transistor are respectively connected to a second power supply line to which a second power supply voltage is supplied and the output electrode; and

a gate signal is applied to a gate electrode of one of the first and second transistors, the gate signal having a pulse width determined based on low order “

b”

bit(s) or the low order “

b”

bit(s) and at least part of high order “

a”

bit(s) in the grayscale data of (a+b) bits.

4. The display driver circuit as defined in claim 2, wherein:

the drive voltage adjusting circuit includes a first transistor and a second transistor;

a source terminal and a drain terminal of the first transistor are respectively connected to a first power supply line to which a first power supply voltage is supplied and the output electrode;

a source terminal and a drain terminal of the second transistor are respectively connected to a second power supply line to which a second power supply voltage is supplied and the output electrode; and

a gate signal is applied to a gate electrode of one of the first and second transistors, the gate signal having a pulse width determined based on low order “

b”

bit(s) or the low order “

b”

bit(s) and at least part of high order “

a”

bit(s) in the grayscale data of (a+b) bits.

5. The display driver circuit as defined in claim 1, wherein:

the drive voltage adjusting circuit includes at least one transistor for gamma correction;

a source terminal and a drain terminal of the transistor for gamma correction are respectively connected to a signal line to which a gamma-corrected voltage is supplied and the output electrode; and

a gate signal generated based on the grayscale data of (a+b) bits is applied to a gate electrode of the transistor for gamma correction.

6. The display driver circuit as defined in claim 2, wherein:

the drive voltage adjusting circuit includes at least one transistor for gamma correction;

a source terminal and a drain terminal of the transistor for gamma correction are respectively connected to a signal line to which a gamma-corrected voltage is supplied and the output electrode; and

a gate signal generated based on the grayscale data of (a+b) bits is applied to a gate electrode of the transistor for gamma correction.

7. The display driver circuit as defined in claim 1, wherein:

the drive voltage adjusting circuit includes a first transistor, a second transistor and at least one transistor for gamma correction;

a source terminal and a drain terminal of the first transistor are respectively connected to a first power supply line to which a first power supply voltage is supplied and the output electrode;

a source terminal and a drain terminal of the second transistor are respectively connected to a second power supply line to which a second power supply voltage is supplied and the output electrode;

a source terminal and a drain terminal of the transistor for gamma correction are respectively connected to a signal line to which a gamma-corrected voltage is supplied and the output electrode;

a gate signal is applied to a gate electrode of one of the first and second transistors, the gate signal having a pulse width determined based on low order “

b”

bit(s) or the low order “

b”

bit(s) and at least part of high order “

a”

bit(s) in the grayscale data of (a+b) bits; and

another gate signal generated based on the grayscale data of (a+b) bits is applied to a gate electrode of the transistor for gamma correction.

8. The display driver circuit as defined in claim 1, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

9. The display driver circuit as defined in claim 2, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

10. The display driver circuit as defined in claim 3, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

11. The display driver circuit as defined in claim 4, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

12. The display driver circuit as defined in claim 5, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

13. The display driver circuit as defined in claim 6, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

14. The display driver circuit as defined in claim 7, wherein:

a pixel electrode is connected to the signal electrode which is electrically connected to the output electrode, through a pixel switch element corresponding to a pixel; and

the precharge voltage is a voltage in the same phase as a voltage of an electrode opposite to the pixel electrode.

15. A display panel comprising:

pixels specified by a plurality of scanning electrodes and a plurality of signal electrodes;

the display driver circuit as defined in claim 1 for driving the signal electrodes based on grayscale data; and

a scanning electrode driver circuit which scans the scanning electrodes.

16. A display device comprising:

a display panel having pixels specified by a plurality of scanning electrodes and a plurality of signal electrodes;

the display driver circuit as defined in claim 1 for driving the signal electrodes based on grayscale data; and

a scanning electrode driver circuit which scans the scanning electrodes.

17. A display drive method for driving a signal electrode based on grayscale data of (a+b) bits (a and b are positive integers), the display drive method comprising:

setting an output electrode electrically connected to the signal electrode at a precharge voltage in a first period within a drive period;

setting the output electrode which has been set at the precharge voltage at a reference voltage based on the grayscale data; and

adjusting a voltage of the output electrode by using the grayscale data, the output electrode having been set at the reference voltage.

18. The display drive method as defined in claim 17, wherein the output electrode is set at the reference voltage based on high order “

a”

bit(s) in the grayscale data of (a+b) bits.

19. The display drive method as defined in claim 17, wherein:

a first power supply voltage and a second power supply voltage are respectively supplied to a first power supply line and a second power supply line; and

one of the first and second power supply lines is electrically connected to the output electrode which has been set at the reference voltage during a period of a pulse width determined based on low order “

b”

bit(s) or the low order “

b”

bit(s) and at least part of high order “

a”

bit(s) in the grayscale data of (a+b) bits.

20. The display drive method as defined in claim 18,

a first power supply voltage and a second power supply voltage are respectively supplied to a first power supply line and a second power supply line;

and

one of the first and second power supply lines is electrically connected to the output electrode which has been set at the reference voltage during a period of a pulse width determined based on low order “

b”

bit(s) or the low order “

b”

bit(s) and at least part of high order “

a”

bit(s) in the grayscale data of (a+b) bits.

21. The display drive method as defined in claim 17,

wherein the output electrode which has been set at the reference voltage is set at a gamma-corrected voltage based on the grayscale data of (a+b) bits.

22. The display drive method as defined in claim 18,

wherein the output electrode which has been set at the reference voltage is set at a gamma-corrected voltage based on the grayscale data of (a+b) bits.

23. The display drive method as defined in claim 19,

wherein the output electrode which has been set at the reference voltage is set at a gamma-corrected voltage based on the grayscale data of (a+b) bits.

24. The display drive method as defined in claim 20,

wherein the output electrode which has been set at the reference voltage is set at a gamma-corrected voltage based on the grayscale data of (a+b) bits.