Driving control circuit for ligth-emitting device

• US 20030156609A1
• Filed: 08/26/2002
• Published: 08/21/2003
• Est. Priority Date: 02/15/2002
• Status: Active Grant

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: Tsai, Chia-Ming
• Granted Patent: US 6,735,228 B2
• Time in Patent Office: Days
• US Class Current: 372/38.02
• CPC Class Codes: G11B 7/126 Circuits, methods or arrangements for laser control or stabilisation
• CPC Class Codes: H01S 5/042 Electrical excitation ; Circuits therefor monolithically integrated laser drive components H01S5/0261

Abstract

A driving control circuit for a light-emitting device. The circuit generates a high-speed modulated current to drive the light-emitting device. The circuit includes an adjustable gain circuit, a current output circuit, and a level control circuit. The adjustable gain circuit receives a digital signal and generates an output voltage controlled by a first control signal and a second control signal. The current output circuit includes a first transistor. A gate of the first transistor is coupled to the adjustable gain circuit, which adjusts a range of the gate voltage to generate the high-speed modulated current, and the level control circuit sets the voltages of the first control signal and the second control signal.

Claims

1. A driving control circuit for a light-emitting device to generate a high-speed modulated current to drive the light-emitting device, comprising:

an adjustable gain circuit for receiving a digital signal and generating an output voltage controlled by a first control signal and a second control signal;

a current output circuit comprising a first transistor, wherein a gate of the first transistor is coupled to the adjustable gain circuit, and the adjustable gain circuit adjusts a range of the gate voltage to generate the high-speed modulated current; and

a level control circuit for setting a voltage of the first control signal and a voltage of the second control signal, the level control circuit comprising;

a duplicate circuit for receiving a high level signal and a low level signal and generating a first output current and a second output current;

a first negative feedback current for setting the first current equal to a first predetermined current and outputting a voltage to set a voltage of the first control signal; and

a second negative feedback current for setting the second current equal to a second predetermined current and outputting a voltage to set a voltage of the second control signal;

wherein the high level signal raises the gate voltage of the first transistor above a high level voltage;

the low level signal lowers the gate voltage of the first transistor below a low level voltage;

the adjustable range of the gate voltage is between the high level voltage and the low level voltage.

2. The circuit as claimed in claim 1, wherein the duplicate circuit comprises:

an adjustable circuit comprising two duplicate adjustable gain circuits, wherein each structure of the duplicate adjustable gain circuits is the same as the adjustable gain circuit;

one of the duplicate adjustable gain circuits receives the high level signal and generates a first output voltage;

the other duplicate adjustable gain circuit receives the low level signal and generates a second output voltage;

a first current output circuit, a structure of which is the same as the current output circuit, comprising a second transistor and outputting the first output current from a source of the second transistor, wherein the first output voltage from the adjustable gain circuit is input to a gate of the second transistor; and

a second current output circuit, a structure of which is the same as the current output circuit, comprising a third transistor and outputting the second output current from a source of the third transistor, wherein the second output voltage form the adjustable gain circuit is input to a gate of the third transistor.

3. The circuit as claimed in claim 2, wherein the duplicate circuit further comprises:

a first level buffer circuit coupled between the adjustable circuit and the first current output circuit for transforming a level of the first output voltage from the adjustable circuit; and

a second level buffer circuit coupled between the adjustable circuit and the second current output circuit for transforming a level of the second output voltage from the adjustable circuit.

4. The circuit as claimed in claim 1, wherein the first negative feedback current comprises a first comparison circuit for comparing the first output circuit and the first predetermined current.

5. The circuit as claimed in claim 1, wherein the second negative feedback current comprises a second comparison circuit for comparing the second output circuit and the second predetermined current.

6. The circuit as claimed in claim 1, wherein the first predetermined current is a bias current of the light-emitting device.

7. The circuit as claimed in claim 1, wherein the first predetermined current is a sum current of a bias current of the light-emitting device and the high-speed modulated current of the light-emitting device.

8. The circuit as claimed in claim 1, further comprising:

a level buffer circuit coupled between the adjustable gain circuit and the current output circuit for transforming a level of the output voltage from the adjustable gain circuit.

9. A driving control circuit for a light-emitting device to generate a high-speed modulated current to drive the light-emitting device, comprising:

an adjustable gain circuit for receiving a digital signal and generating a output voltage controlled by a first control signal and a second control signal;

a current output circuit comprising a first transistor, wherein a gate of the first transistor is coupled to the adjustable gain circuit, and the adjustable gain circuit adjusts a range of the gate voltage to generate the high-speed modulated current; and

a level control circuit for setting a voltage of the first control signal and a voltage of the second control signal, the level control circuit comprising;

a level detect circuit coupled to the adjustable gain circuit and generating a first output current and a second output current;

a first negative feedback current for setting the first current equal to a first predetermined current and outputting a voltage to set a voltage of the first control signal; and

a second negative feedback current for setting the second current equal to a second predetermined current and outputting a voltage to set a voltage of the second control signal;

wherein the adjustable range of the gate voltage is between a high level voltage and a low level voltage.

10. The circuit as claimed in claim 9, wherein the level detect circuit comprises:

a level detector for receiving the output voltage from the adjustable gain circuit and generating the high level voltage and a low level voltage after detecting a level of the output voltage;

a first current output circuit, a structure of which is the same as the current output circuit, comprising a second transistor and outputting the first output current from a source of the second transistor, wherein the first output voltage from the adjustable gain circuit is input to a gate of the second transistor; and

a second current output circuit, a structure of which is the same as the current output circuit, comprising a third transistor and outputting the second output current from a source of the third transistor, wherein the second output voltage from the adjustable gain circuit is input to a gate of the third transistor.

11. The circuit as claimed in claim 10, wherein the level detect circuit comprises:

a first level buffer circuit coupled between the level detector and the first current output circuit for transforming a level of the first output voltage from the adjustable circuit; and

a second level buffer circuit coupled between the level detector and the second current output circuit for transforming a level of the second output voltage from the adjustable circuit.

12. The circuit as claimed in claim 9, wherein the first negative feedback current comprises a first comparison circuit for comparing the first output circuit and the first predetermined current.

13. The circuit as claimed in claim 9, wherein the second negative feedback current comprises a second comparison circuit for comparing the second output circuit and the second predetermined current.

14. The circuit as claimed in claim 9, wherein the first predetermined current is a bias current of the light-emitting device.

15. The circuit as claimed in claim 9, wherein the first predetermined current is a sum current of a bias current of the light-emitting device and the high-speed modulated current of the light-emitting device.

16. The circuit as claimed in claim 9, further comprising:

a level buffer circuit coupled between the adjustable gain circuit and the current output circuit for transforming a level of the output voltage from the adjustable gain circuit.