Anomaly detection system

• US 20030158679A1
• Filed: 09/25/2002
• Published: 08/21/2003
• Est. Priority Date: 02/18/2002
• Status: Abandoned Application

• Current Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Fukushima, Toru
• Application Number:
  US10/253,813
• Publication Number:
  US 20030158679A1
• Time in Patent Office: Days
• US Class Current: 702/81
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/0004 Industrial image inspection

Abstract

An anomaly detection system that can detect physical-positional anomalies or probably abnormal symptoms in a product on a wafer even if an inspector passively monitors map data or anomalies in a unit of test such as a lot of products do not reach a predetermined anomaly reference value. An input module 32 of an anomaly detection system 30 inputs positional data 15 about the position of each of a plurality of semiconductor product on a wafer from a wafer prober and inputs a predetermined test result data 25 about the semiconductor product from an LSI tester 20 each time a test on the plurality of semiconductor products. A detector 33 detects a predetermined abnormal value pattern in a plurality of semiconductor products having a predetermined abnormal value in the predetermined test result data 25 inputted by the input module 32. An output section 34 outputs detection result data 35 (an alarm if the abnormal pattern is detected).

Claims

1. An anomaly detection system for detecting anomalies in a plurality of semiconductor products formed on a wafer, comprising:

input means for inputting positional data about the position of each of said semiconductor products on the wafer and a predetermined test result data about the semiconductor product; and

detection means for detecting a predetermined abnormal value pattern based on the positional data in a plurality of semiconductor products in which the predetermined test result data inputted by said input means has a predetermined abnormal value.

2. The anomaly detection system according to claim 1, further comprising an abnormal pattern registration section in which said predetermined abnormal value pattern indicated by said predetermined test result data is registered,

wherein said detection means detects the predetermined abnormal value pattern based on the positional data about the plurality of semiconductor products, the detection being based on the comparison between

the predetermined test result data and the positional data inputted by said input means and

the predetermined abnormal value pattern indicated by the predetermined test result data registered in said registration section.

3. The anomaly detection system according to claim 2, wherein said predetermined abnormal value pattern registered in said abnormal pattern registration section contains the type of a abnormal value indicated by the predetermined test result data, the degree of the abnormal value, and the identifier of the abnormal value pattern.

4. The anomaly detection system according to claim 1, further comprising output means for outputting the predetermined abnormal value pattern detected by said detection means on a predetermined unit of test basis.

5. The anomaly detection system according to claim 1, wherein the positional data inputted by said input means is two-dimensional coordinates data of the semiconductor products on the wafer and thepredetermined abnormal value pattern detected by said detection means is a predetermined two-dimensional geometry on the wafer.