Watchdog arrangement

• US 20030158700A1
• Filed: 11/27/2002
• Published: 08/21/2003
• Est. Priority Date: 11/27/2002
• Status: Abandoned Application

• Current Assignee: Thomson Licensing SA (Vantiva SA)
• Original Assignee: Thomson Licensing SA (Vantiva SA)
• Inventors: Forler, Joseph Wayne, Testin, William John, Nierzwick, Mark Alan
• Application Number:
  US10/296,898
• Publication Number:
  US 20030158700A1
• Time in Patent Office: Days
• US Class Current: 702/178
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

A watchdog arrangement advantageously provides systems, such as television signal processing apparatus, with a reliable, cost effective means by which to maintain consistent, stable operation. According to at least one embodiment, a hardware watchdog circuit receives regular pulses from a software timer in an integrated circuit (IC) to refresh itself. In the event that the watchdog circuit is not refreshed, it provides a predetermined logic signal to a non-maskable interrupt (NMI) terminal of the IC to generate a reset similar to what is generated by an internal IC watchdog.

Claims

1. A watchdog circuit arrangement, comprising:

an integrated circuit including a first watchdog for monitoring an operational state of the integrated circuit; and

a second watchdog external to the integrated circuit, wherein the second watchdog enables the integrated circuit to be reset in dependence upon receiving electrical signals provided by the integrated circuit.

2. The watchdog circuit arrangement of claim 1, wherein the first watchdog is implemented at least in part by software, and the second watchdog is implemented by hardware.

3. The watchdog circuit arrangement of claim 1, wherein the integrated circuit comprises a microprocessor.

4. The watchdog circuit arrangement of claim 1, wherein the first and second watchdogs are embodied in a consumer electronics device.

5. The watchdog circuit arrangement of claim 4, wherein the consumer electronics device comprises a television signal processing apparatus.

6. The watchdog circuit arrangement of claim 1, wherein the second watchdog protects the integrated circuit against electrostatic discharges.

7. The watchdog circuit arrangement of claim 1, wherein the second watchdog protects the integrated circuit against Kine-Arc transients.

8. The watchdog circuit arrangement of claim 1, wherein the second watchdog enables the integrated circuit to be reset in response to the integrated circuit failing to provide the electrical signals to the second watchdog for a given period of time.

9. The watchdog circuit arrangement of claim 1, wherein the second watchdog enables the integrated circuit to be reset by applying a predetermined logic signal to a terminal of the integrated circuit.

10. The watchdog circuit arrangement of claim 9, wherein the terminal of the integrated circuit is a non-maskable interrupt terminal.

11. A watchdog arrangement, comprising:

an integrated circuit including first and second watchdogs for monitoring an operational state of the integrated circuit, wherein the second watchdog resets the first watchdog in response to a predetermined condition of the first watchdog.

12. The watchdog arrangement of claim 11, wherein the first and second watchdogs are implemented at least in part by software.

13. The watchdog arrangement of claim 11, wherein the integrated circuit comprises a microprocessor.

14. The watchdog arrangement of claim 11, wherein the first and second watchdogs are embodied in a consumer electronics device.

15. The watchdog arrangement of claim 14, wherein the consumer electronics device comprises a television signal processing apparatus.

16. A method for providing a watchdog function for an integrated circuit, comprising steps of:

providing a first watchdog internal to the integrated circuit for monitoring an operational state of the integrated circuit; and

providing a second watchdog external to the integrated circuit for enabling the integrated circuit to be reset in response to electrical signals provided by the integrated circuit.

17. The method of claim 16, wherein the first watchdog is implemented at least in part by software, and the second watchdog is implemented by hardware.

18. The method of claim 16, wherein the integrated circuit comprises a microprocessor.

19. The method of claim 16, wherein the first and second watchdogs are embodied in a consumer electronics device.

20. The method of claim 19, wherein the consumer electronics device comprises a television signal processing apparatus.

21. The method of claim 16, wherein the second watchdog protects the integrated circuit against electrostatic discharges.

22. The method of claim 16, wherein the second watchdog protects the integrated circuit against Kine-Arc transients.

23. The method of claim 16, wherein the second watchdog enables the integrated circuit to be reset in response to the integrated circuit failing to provide the electrical signals to the second watchdog for a given period of time.

24. The method of claim 16, wherein the second watchdog enables the integrated circuit to be reset by applying a predetermined logic signal to a terminal of the integrated circuit.

25. The method of claim 24, wherein the terminal of the integrated circuit is a non-maskable interrupt terminal.