Method and configuration for the transmission of signals from generating functional units to processing functional units of electrical circuits

• US 20030163725A1
• Filed: 12/13/2002
• Published: 08/28/2003
• Est. Priority Date: 12/19/2001
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Feuser, Markus, Mueller, Detlef
• Granted Patent: US 7,647,506 B2
• Time in Patent Office: Days
• US Class Current: 713/200
• CPC Class Codes: G06F 21/10 Protecting distributed programs or content, e.g. vending or licensing of copyrighted material protection in video systems or pay television H04N7/16 ; Digital rights management [DRM]

Abstract

The invention relates to a method and a configuration for the transmission of signals from generating functional units to processing functional units of electrical circuits, which can be used to prevent the interception of information being exchanged between two functional units that are located separately in the layout.

The sensitive signal is formed by a functional unit. Instead of passing this signal on directly to a processing functional unit, it is gated with a reference signal formed by a signal generator. These circuit components are located close together in the layout, so the sensitive circuit is short.

The coded signal is passed to the next block. This connection may be long. Once it has arrived at the next block, an identical reference signal is formed. The signal generator used for this purpose is not of identical design with the first one, so a hacker cannot recognize the similarity. The sensitive signal is reproduced with the reference signal. A monitoring circuit can check whether the regenerated signal is “plausible”. If not, a hacking attempt can be assumed.

Claims

1. A method for the transmission of signals from generating functional units to processing functional units of electrical circuits, characterized in that the signals to be transmitted are coded and/or modulated after being emitted by the generating functional unit (1), and decoded and/or demodulated before being received by the processing functional unit (3).

2. A method as claimed in claim 1, characterized in that the transmission of the signals takes place between a generating functional unit (1) and a processing functional unit (3) of a Smartcard controller.

3. A method as claimed in any one of the preceding claims, characterized in that the coding and/or modulation of the signals to be transmitted takes place through gating with a reference signal.

4. A method as claimed in any one of the preceding claims, characterized in that the reference signal comprises one or more bits.

5. A method as claimed in any one of the preceding claims, characterized in that the generation of a time-dependent reference signal takes place through the use of clock signals and/or through the use of time-adjustable signals.

6. A method as claimed in any one of the preceding claims, characterized in that the reference signals are generated by at least one signal generator.

7. A method as claimed in any one of the preceding claims, characterized in that the reference signal is generated both in the generating functional unit (1) and the processing functional unit (3).

8. A method as claimed in any one of the preceding claims, characterized in that a reference signal generated in the generating functional unit (1) is transmitted to the processing functional unit (3).

9. A method as claimed in any one of the preceding claims, characterized in that monitoring of the reference signal and/or monitoring of the reproduced signal (6b) takes place.

10. A configuration for the transmission of signals from generating functional units to processing functional units of electrical circuits, characterized in that at least one means for coding/decoding and/or modulation/demodulation of the signals to be transmitted from a generating functional unit (1) to a processing functional unit (3) of an electrical circuit is arranged between the generating functional unit (1) and the processing functional unit (3).

11. A configuration as claimed in claim 10, characterized in that the generating functional unit (1) and the processing functional unit (3) are part of a Smartcard controller.

12. A configuration as claimed in claim 10 or 11, characterized in that the means for coding/decoding and/or modulation/demodulation of the signals comprise at least one signal generator and two means for gating signals.

13. A configuration as claimed in claim 12, characterized in that the means for gating signals is an XOR-gate (5).

14. A configuration as claimed in any one of claims 10 to 13, characterized in that the means for coding/decoding and/or modulation/demodulation of the signals can be controlled by a clock-signal transmitter.

15. A configuration as claimed in any one of claims 10 to 14, characterized in that the means for coding/decoding and/or modulation/demodulation of the signals is/are arranged in the layout of the circuit in the immediate vicinity of the generating functional unit (1) and/or the processing functional unit (3).

16. A configuration as claimed in any one of claims 10 to 15, characterized in that, where multiple signal generators are used, these are each executed in a different layout.

17. A configuration as claimed in any one of claims 10 to 16, characterized in that the means for coding/decoding and/or modulation/demodulation of the signals is/are arranged in the layout of the circuit in alternating combination with further elements of the glue logic of the generating functional unit (1) and/or processing functional unit (3).

18. A configuration as claimed in any one of claims 10 to 17, characterized in that the generating functional unit(s) (1) is/are in the form of an analog circuit, and the processing functional unit(s) (3) is/are in the form of a digital logic circuit.

19. A configuration as claimed in any one of claims 10 to 18, characterized in that the signal generator(s) is/are in the form of counter(s).

20. A configuration as claimed in any one of claims 10 to 19, characterized in that the generating functional unit(s) (1) and/or the processing functional unit(s) (3) are component parts of an integrated circuit.