Computer readable medium and a method for representing an electronic circuit as a routing-resource graph

• US 20030163796A1
• Filed: 02/28/2002
• Published: 08/28/2003
• Est. Priority Date: 02/28/2002
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Snider, Gregory Stuart
• Granted Patent: US 6,738,961 B2
• Time in Patent Office: Days
• US Class Current: 716/12
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: Y10S 707/99942 Manipulating data structure, e.g. compression, compaction, compilation
• CPC Class Codes: Y10S 707/99943 Generating database or data structure, e.g. via user interface

Abstract

A computer readable medium containing a computer program for representing an electronic circuit, which has been segmented into plurality blocks, as a routing-resource graph includes a first wiring data structure with first switch information and a first wire identity information to identify a first wire across a first plurality of blocks, a second wiring data structure with the first switch information and a second wire identity information to identify a second wire across a second plurality of blocks, and a first switch data structure having wire information and associated with the first and second wiring data structures for identifying a third wire connected to the first wire with a switch as a function of the first wire identity information and wire information from the first switch data structure.

Claims

1. A computer readable medium containing a computer program for representing an electronic circuit, which has been segmented into plurality blocks, as a routing-resource graph, which comprises:

a first wiring data structure with first switch information and a first wire identity information to identify a first wire across a first plurality of blocks;

a second wiring data structure with the first switch information and a second wire identity information to identify a second wire across a second plurality of blocks; and

a first switch data structure having wire information and associated with the first and second wiring data structures for identifying a third wire connected to the first wire with a switch as a function of the first wire identity information and wire information from the first switch data structure.

2. The computer readable medium according to claim 1, wherein the first switch data structure can identify a fourth wire connected to the second wire with another switch as a function of the second wire identity information and wire information from the first switch data structure.

3. The computer readable medium according to claim 1, wherein the wire information is a first local wire name of the first wire and a second local wire name of the third wire in a block where the switch connects the first and third wires.

4. The computer readable medium according to claim 1, wherein the switch information is an array of switch data structures representing switches that the first wire and second wire drive.

5. The computer readable medium according to claim 4, wherein the array of switch data structures represents a first plurality of switches at relative locations along the first wire within a first plurality of blocks and a second plurality of switches at relative locations along the second wire within a second plurality of blocks.

6. The computer readable medium according to claim 1, wherein the first switch data structure includes a method call to determine a pointer to the second wire.

7. A method for representing an electronic circuit as a routing-resource graph comprising:

defining a plurality of blocks each having a regular sub-array of switches and wires;

defining a first wiring data structure with first switch information and first wire identity information to identify a first wire;

defining a second wiring data structure with first switch information and second wire identity information to identify a second wire; and

defining a first switch data structure associated with the first and second wiring data structures for identifying wires respectively connected to the first and second wires by a switch as a function of wire identity information and wire information from the first switch data structure.

8. The method of claim 7 comprising:

identifying a switch at a relative location along a first wire within a plurality of first blocks; and

identifying another switch at the relative location along a second wire within a second plurality of blocks.