Battery state monitoring circuit

• US 20030169050A1
• Filed: 02/20/2003
• Published: 09/11/2003
• Est. Priority Date: 02/28/2002
• Status: Active Grant

• Current Assignee: Ablic Inc. (MinebeaMitsumi Inc.)
• Original Assignee: Seiko Instruments Incorporated (Seiko Group)
• Inventors: Aikawa, Yasunori, Sakurai, Atsushi
• Granted Patent: US 6,771,048 B2
• Time in Patent Office: Days
• US Class Current: 324/426
• CPC Class Codes: G01R 19/16542 for batteries charge condition monitoring in G01R31/36
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/367 Software therefor, e.g. for battery testing using modelling or look-up tables
• CPC Class Codes: G01R 31/3842 combining voltage and current measurements

Abstract

A battery apparatus having a long duration (use time period) in which when a voltage of secondary batteries is a hysteresis voltage, in response to a charge inhibition signal outputted from a microcomputer and exhibiting that the secondary batteries should be in a charge inhibition state, a signal used to restrict charge of the secondary batteries is outputted to a charge control terminal and also a signal having information of the charge inhibition state is outputted to a secondary battery controlling circuit to suppress the output of a hysteresis voltage signal from the secondary battery controlling circuit.

Claims

1. A battery state monitoring circuit comprising:

a charge control terminal through which a signal used to control the charge current of the secondary batteries is outputted;

a discharge control terminal through which a signal used to control the discharge current of the secondary batteries is outputted;

a battery voltage monitoring terminal through which the charge voltage of the secondary batteries is monitored;

a secondary battery controlling circuit for, in response to the signal outputted through the battery voltage monitoring terminal, outputting a charge completion signal exhibiting that the secondary batteries are in a full charge state, and a hysteresis voltage signal exhibiting that the voltage of the secondary batteries is a hysteresis voltage;

a control terminal for a microcomputer through which a signal used to manage/control a state of the charge/discharge current is inputted; and

a charge control circuit for, in response to the charge completion signal and the signal used to manage/control a state of the charge/discharge current which is inputted through the control terminal for a microcomputer, outputting a signal used to control the charge of the secondary batteries to the charge control terminal,

wherein the charge control circuit, when the voltage of the secondary batteries is the hysteresis voltage, in response to a charge inhibition signal outputted from the microcomputer and exhibiting that the secondary batteries should be in a charge inhibition state, outputs a signal used to restrict the charge of the secondary batteries to the charge control terminal and also outputs a signal having information of the charge inhibition state to the secondary battery controlling circuit to suppress the output of the hysteresis voltage signal from the secondary battery control circuit.

2. A battery state monitoring circuit according to claim 1;

wherein the charge control circuit comprises an OR circuit having an input terminal connected to an output terminal of the secondary battery controlling circuit and the control terminal for a microcomputer, a Delay circuit having an input terminal to which an output terminal of the OR circuit is connected, and an AND circuit having an input terminal to which an output terminal of the Delay circuit and an output terminal of the secondary battery control circuit are connected, the output terminal of the Delay circuit is connected to the charge control terminal and an output terminal of the AND circuit is connected to the secondary battery controlling circuit.