Delta-sigma modulator with feed-forward path

• US 20030169193A1
• Filed: 08/02/2002
• Published: 09/11/2003
• Est. Priority Date: 03/08/2002
• Status: Active Grant

• Current Assignee: Zarlink Semiconductor US Inc (Microchip Technology Incorporated)
• Original Assignee: Zarlink Semiconductor US Inc (Microchip Technology Incorporated)
• Inventors: Delight, Guy, LeReverend, Remi
• Granted Patent: US 6,697,000 B2
• Time in Patent Office: Days
• US Class Current: 341/143
• CPC Class Codes: H03M 3/45 with distributed feedforward inputs, i.e. with forward paths from the modulator input to more than one filter stage

Abstract

A delta-sigma modulator comprising a number of integration stages and having a feed-forward path from a signal input section to the signal path prior to a final integration stage, so as to reduce processing in the majority of integration stages to error processing. A delta-sigma modulator with acceptable dynamic range and incomplete settling can be designed for audio applications using a ratio of gain bandwidth product to sampling frequency in terms of a resolution of the converter. Satisfying the criteria provided by the ratio reduces the gain bandwidth requirement below that previously used as acceptable values in data converter design.

Claims

1. A delta-sigma modulator employing a single loop, fourth order architecture, comprising:

an input signal section;

an output signal section;

four integration stages connected in a cascaded configuration and having a signal path;

at least one feedback path from said output signal section; and

a feed-forward path comprising a differentiator, connected to said input signal section and to said signal path prior to a fourth integration stage.

2. The delta-sigma modulator of claim 1, wherein said feed-forward path is also connected to said signal path prior to the third integration stage.

3. The delta-sigma modulator of claim 1, wherein the delta-sigma modulator has a resolution and wherein at least one of said integration stages has a ratio of gain bandwidth product to sampling frequency of less than about 0.2 times said resolution.

4. A method of improving error processing in a fourth order delta-sigma modulator having four integration stages, comprising connecting an input signal feed-forward path to the signal path prior to a fourth integration stage, and differentiating an input signal along said feed-forward path.

5. A circuit for improving error processing in a fourth order delta-sigma modulator, wherein said modulator has four integration stages, comprising a feed-forward path from an input of said delta-sigma modulator connected to the signal path prior to a fourth integration stage, wherein said feed-forward path includes a differentiator.

6. The circuit of claim 5, wherein said modulator comprises a single loop architecture.

7. The circuit of claim 5, wherein said modulator has resolution and wherein at least one of said integration stages has a ratio of gain bandwidth product to sampling frequency of less than about 0.2 times said resolution.

8. A fourth order delta-sigma modulator, for use in an analog to digital converter, comprising:

an input signal section;

an output signal section;

a plurality of integration stages connected in a cascaded configuration; and

a feed-forward path coupled to said input signal section and connected to the signal path prior to a last of said plurality of integration stages, comprising a differentiator.

9. The delta-sigma modulator of claim 8, wherein the modulator has a single loop architecture.

10. A hearing aid comprising a fourth order delta-sigma modulator, wherein said modulator has a feed-forward path from an input signal section connected to the signal path prior to a final integration stage.

11. The hearing aid of claim 10, wherein the feed-forward path includes a differentiator.

12. The hearing aid of claim 10, wherein the modulator has a single loop architecture.

13. The hearing aid of claim 10, wherein the modulator has a resolution and a plurality of integration stages, and wherein at least one of said integration stages has a ratio of gain bandwidth product to sampling frequency of less than about 0.2 times said resolution.

14. An audio circuit, comprising a fourth order delta sigma modulator having a feed-forward path connected from an input signal section to the signal path prior to a final integration stage.

15. The audio circuit of claim 14, wherein the feed-forward path includes a differentiator.

16. The audio circuit of claim 14, wherein the modulator has a single loop architecture.

17. The audio circuit of claim 14, wherein the modulator has a plurality of integrators and a resolution, and wherein at least one of said integrators has a ratio of gain bandwidth product to sampling frequency of less than about 0.2 times said resolution.

18. A delta-sigma modulator, comprising:

an input signal section;

an output signal section;

four integration stages connected in series, each having an input and an output;

a first feedback path having a first end connected to the output of the fourth integration stage and a second end connected to the input of the third integration stage;

a second feedback path having a first end connected to the output signal section and a second end connected to the input signal section;

a third feedback path having a first end connected to the output signal section and a second end connected to the input of the fourth integration stage;

a first feed-forward path having a first end connected to the output of the first integration stage and a second end connected to the input of the fourth integration stage;

a second feed-forward path having a first end connected to the output of the second integration stage and a second end connected to the input of the fourth integration stage; and

a third feed-forward path having a first end connected to the input signal section and a second end connected to the input of the fourth integration stage.

19. The modulator of claim 18, wherein the third feed-forward path includes a differentiator.

20. The modulator of claim 18, further comprising a fourth feed-forward path having a first end connected to the input signal section and a second end connected to the input of the third integration stage.

21. A delta-sigma modulator, comprising:

an input signal section;

an output signal section;

four integration stages connected in a cascaded configuration and having a signal path, wherein at least one of said integration stages has a ratio of gain bandwidth product to sampling frequency of less than about 0.2 times a resolution of the modulator;

at least one feedback path from said output signal section; and

a feed-forward path comprising a differentiator, connected to said input signal section and to said signal path prior to a fourth integration stage.

22. The delta-sigma modulator of claim 21, wherein said ratio of gain bandwidth product to sampling frequency is greater than about 0.04 times said resolution.

23. A method of reducing power consumption and improving error processing in an audio communication product having a delta-sigma modulator with a plurality of integrators, comprising reducing a ratio of gain bandwidth product to sampling frequency of the at least one integrator to below about 0.2 times a resolution of the data converter, connecting an input signal feed-forward path to the signal path prior to a fourth integration stage, and differentiating an input signal along said feed-forward path.