Scheduling system and method

• US 20030171972A1
• Filed: 01/28/2003
• Published: 09/11/2003
• Est. Priority Date: 01/28/2002
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Heskin, James
• Application Number:
  US10/352,653
• Publication Number:
  US 20030171972A1
• Time in Patent Office: Days
• US Class Current: 705/9
• CPC Class Codes: G05B 19/41865 characterised by job scheduling, process planning, material flow
• CPC Class Codes: G05B 2219/32247 Real time scheduler
• CPC Class Codes: G05B 2219/32258 Resource, machine assignment preferences, actual and anticipated load
• CPC Class Codes: G06Q 10/0631 Resource planning, allocation, distributing or scheduling for enterprises or organisations
• CPC Class Codes: G06Q 10/0635 Risk analysis of enterprise or organisation activities
• CPC Class Codes: G06Q 10/109 Time management, e.g. calendars, reminders, meetings or time accounting
• CPC Class Codes: H01L 21/67276 Production flow monitoring, e.g. for increasing throughput program-control systems per se G05B19/00, e.g. total factory control G05B19/418
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

Wafer fab scheduling/planning rule structure including reports for and heuristic bottleneck forecasting for real-time rescheduling.

Claims

1. A method of scheduling, comprising the steps of:

(a) providing first and second reports with a time interval for updating said first report greater than a time interval for updating said second report; and

(b) rescheduling work in a factory according to current versions of said first and second reports.

2. The method of claim 1, wherein:

(a) said rescheduling includes dynamic bottleneck estimation.