Method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof
First Claim
1. A method of manufacturing a nonvolatile memory cell, comprising:
- providing a substrate;
forming at least one gate structure on the substrate;
forming diffusion regions in the substrate on either side of the gate structure;
forming a conformal linear oxide layer on the gate structure and the substrate;
forming a conformal nitride layer on the linear oxide layer;
anisotropically etching the nitride layer and the linear oxide layer to expose a partial surface of the substrate and the top surface of the gate structure, thereby forming linear oxide spacers on the sides of the gate structure and nitride spacers on the sides of the linear oxide spacers;
forming a conformal oxide layer on the linear oxide spacers, the nitride spacers, the gate structure and the substrate; and
anisotropically etching the oxide layer to expose a partial surface of the substrate and the top surface of the gate structure, thereby forming oxide spacers on the sides of the nitride spacers;
wherein, mobile ions are blocked from approaching the gate structure by means of the nitride spacers.
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Abstract
A method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof. A gate structure is formed on a substrate. Diffusion regions are formed in the substrate on either side of the gate structure. A linear oxide layer is formed on the gate structure and the substrate. A conformal nitride layer is formed on the linear oxide layer. The nitride layer and the linear oxide layer are partially etched back to form linear oxide spacers on the sides of the gate structure and nitride spacers on the sides of the linear oxide spacers. A conformal oxide layer is formed on the linear oxide spacers, the nitride spacers, the gate structure and the substrate. The oxide layer is partially etched back to form oxide spacers on the sides of the nitride spacers.
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Citations
20 Claims
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1. A method of manufacturing a nonvolatile memory cell, comprising:
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providing a substrate;
forming at least one gate structure on the substrate;
forming diffusion regions in the substrate on either side of the gate structure;
forming a conformal linear oxide layer on the gate structure and the substrate;
forming a conformal nitride layer on the linear oxide layer;
anisotropically etching the nitride layer and the linear oxide layer to expose a partial surface of the substrate and the top surface of the gate structure, thereby forming linear oxide spacers on the sides of the gate structure and nitride spacers on the sides of the linear oxide spacers;
forming a conformal oxide layer on the linear oxide spacers, the nitride spacers, the gate structure and the substrate; and
anisotropically etching the oxide layer to expose a partial surface of the substrate and the top surface of the gate structure, thereby forming oxide spacers on the sides of the nitride spacers;
wherein, mobile ions are blocked from approaching the gate structure by means of the nitride spacers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A nonvolatile memory cell structure, comprising:
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a substrate having a gate structure;
linear oxide spacers formed on the sides of the gate structure;
nitride spacers formed on the sides of the linear oxide spacers;
oxide spacers formed on the sides of the nitride spacers; and
diffusion regions formed in the substrate on either side of the gate structure;
wherein, mobile ions are blocked from approaching the gate structure by means of the nitride spacers. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification