Analog power detection for gain control operations
First Claim
1. A radio receiver formed in an integrated circuit, comprising:
- a low noise amplifier (LNA) coupled to receive a radio frequency (RF) signal from an antenna;
a pair of mixers coupled to receive an output of the LNA, the mixers for down converting the received RF signal to baseband;
a pair of filters for receiving down converted signals from the mixers;
logic circuitry for providing gain level control signals;
at least one programmable gain amplifier (PGA) for providing controlled gain steps according to the gain level control signals received from the logic circuitry; and
an analog peak detection circuit coupled to receive filtered I and Q baseband signals from the filters having an output voltage characterized by a square root of the sum of the squares of the magnitude of the I and Q components.
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Accused Products
Abstract
A method and apparatus for dynamically controlling a programmable gain amplifier (PGA) in a radio receiver to provide a plurality of gain steps thereby providing automatic gain control (AGC) in a receiver intermediate frequency (IF) stage comprises an analogy peak detector formed to including a constant current source and a plurality of MOSFETs all configured to produce an output voltage (DC) whose value reflects a peak amplitude of a received differential quadrature phase shift keyed (QPSK) signal. A first circuit portion generates currents that are proportional to the square of the magnitude of the gate to source voltage for each of a plurality of MOSFETs coupled to receive the differential QPSK signal and a second circuit portion produces a voltage that is equal to the square root of the sum of the squares of the currents produced (drawn) by the MOSFETs of the first circuit portion.
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Citations
21 Claims
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1. A radio receiver formed in an integrated circuit, comprising:
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a low noise amplifier (LNA) coupled to receive a radio frequency (RF) signal from an antenna;
a pair of mixers coupled to receive an output of the LNA, the mixers for down converting the received RF signal to baseband;
a pair of filters for receiving down converted signals from the mixers;
logic circuitry for providing gain level control signals;
at least one programmable gain amplifier (PGA) for providing controlled gain steps according to the gain level control signals received from the logic circuitry; and
an analog peak detection circuit coupled to receive filtered I and Q baseband signals from the filters having an output voltage characterized by a square root of the sum of the squares of the magnitude of the I and Q components. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A radio receiver formed in an integrated circuit, comprising:
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a low noise amplifier (LNA) coupled to receive a radio frequency (RF) signal from an antenna;
a mixer coupled to receive an output of the LNA, the mixer for down converting the received RF signal to baseband;
at least one programmable gain amplifier (PGA) for providing controlled gain steps according to received control signals; and
analog peak detection circuitry whose output voltage further including;
a first circuit portion for squaring the magnitude of four quadrature signals;
a second circuit portion coupled to the first circuit portion for summing each of the squared signals and for providing a square root of the current driven by the first circuit portion; and
logic circuitry coupled to receive a peak voltage component from the analog peak detection circuit, the logic circuitry for generating the control signals to the PGA. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A radio receiver, comprising:
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transceiver circuitry for transmitting and receiving communication signals for communicating using phase shift keyed modulation circuitry;
programmable gain amplifier circuitry for receiving differential phase shift keyed modulation signals from the transceiver circuitry, and analog peak detection circuit further comprising;
a first circuit portion, the first circuit portion further including a first plurality of MOSFETs, each having a gate terminal coupled to receive a differential modulated signal component;
a second circuit portion, the second circuit portion further including a second plurality of MOSFETs, each having a gate terminal coupled to VDD, the second circuit portion further including a current source for providing a specified constant current. - View Dependent Claims (18, 19)
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20. A method in a radio receiver formed within an integrated circuit for adjusting a gain level of a programmable gain amplifier, comprising:
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receiving a differential modulated signal at each of a first plurality of MOSFETs;
biasing each of the MOSFETS of the first plurality of MOSFETs into a saturation region;
producing a current at each of the first plurality of MOSFETs that is equal to a function of the square of the gate to source voltage;
summing the currents produced by the first plurality of MOSFETs to draw a current;
producing, in a current source, a constant amount of current into a node coupled to the drains of the first plurality of MOSFETs; and
producing, in a second plurality of MOSFETs whose gate terminals are coupled to a supply voltage to place the second plurality of MOSFETs in a saturation mode of operation, an amount of current that is equal to a device constant (Beta) times the square of the amplitude of the phase modulated signals received at the gate terminals of the first plurality of MOSFETs. - View Dependent Claims (21)
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Specification