Mutiple-platform virtual microprocessor architecture and its corresponding operating system, in particular for onboard and mobile computer field

• US 20030182347A1
• Filed: 05/14/2003
• Published: 09/25/2003
• Est. Priority Date: 09/20/2000
• Status: Abandoned Application

• Current Assignee: Cellon International Holding Corporation
• Original Assignee: Cellon International Holding Corporation
• Inventors: Dehlinger, Patrick
• Application Number:
  US10/380,837
• Publication Number:
  US 20030182347A1
• Time in Patent Office: Days
• US Class Current: 718/1
• CPC Class Codes: G06F 9/45554 Instruction set architectures of guest OS and hypervisor or native processor differ, e.g. Bochs or VirtualPC on PowerPC MacOS

Abstract

The architecture comprises a host machine itself comprising a hardware platform (110) with a physical host microprocessor, a software platform (120) with a host operating system (121), and memory and hardware manager modules (123 and 124). The host machine is combined with middleware means (130) themselves comprising: a kernel (131) implementing low level functions and including an interface (132) with the host operating system and the memory and hardware managers; an API (134, 135) suitable for receiving executable instructions (200) formulated in a language that is independent of the host microprocessor and system; high level functional modules (133); and means (136, 137) for transcribing the executable instruction code into low level code directly executable on the host microprocessor. All data exchanged between the middleware means (130) and the software platform (120) is implemented via the interface (132). All of the middleware means, with the exception of the interface of the kernel, is encoded in a language that is independent of the host machine.

Claims

1. / A multiple-platform virtual microprocessor (100) and its corresponding operating system, for use in particular for the field of mobile and embedded computing,

characterized in that it comprises in combination:

a host machine with;

a hardware platform (110) comprising a physical host microprocessor; and

a software platform (120) comprising;

a host operating system (121);

memory and hardware manager modules (123 and 124); and

optional native applications (126); and

middleware means (130) comprising;

a kernel (131) implementing low level functions, said kernel including an interface (132) with i) said host operating system, ii) said memory and hardware manager modules, and iii) said native applications, if any;

an API (134, 135) suitable for receiving executable instructions (200) formulated in a language that is independent of the host microprocessor and system, the virtual microprocessor operating in response to said executable instructions;

high level functional modules (133) interfaced i) between one another, ii) with the API, and iii) with the kernel; and

means (136, 137) for transcribing the code of said executable instructions into low level code directly executable on the host microprocessor;

in that all exchange of data between the middleware means (130) and the software platform (120) takes place via said interface (132) of the kernel (131); and

in that all of the middleware means, excepting said interface of the kernel, is encoded in a language independent of the host machine.

2. / The virtual microprocessor and its corresponding operating system of claim 1, in which the code of the middleware is incorporated in a read-only memory or in a microcontroller flash memory.

3. / The virtual microprocessor and its corresponding operating system of claim 1, in which said means for transcribing the executable instruction code into low level code directly executable on the host microprocessor are means taken from the group comprising:

a code translator (136); and

a just-in-time compiler (137).

4. / The virtual microprocessor and its corresponding operating system of claim 1, in which said means for transcribing the code of the executable instructions into low level code directly executable on the host microprocessor comprise a bytecode converter.

5. / The virtual microprocessor and its corresponding operating system of claim 1, in which said low level functions implemented by the kernel (131) are functions of the group comprising:

an IOCS/BIOS;

a memory manager distinct from the memory manager of the host platform; and

a manager for the stacks of the middleware means.

6. / The virtual microprocessor and its corresponding operating system of claim 5, in which the low level functions implemented by the kernel (131) include managing an integrated graphics user interface that is independent of the host operating system.

7. / The virtual microprocessor and its corresponding operating system of claim 5, in which said low level functions implemented by the kernel (131) further include functions from the group comprising:

allocating and deallocating a memory zone shared between a plurality of applications;

an inter-thread semaphore;

creating and deleting threads;

creating and deleting timers;

RAW type writing and reading to a video driver;

managing a hardware or software keyboard input peripheral;

managing a pointer peripheral;

managing an output peripheral for a hardware connection;

saving energy;

giving access to a mass storage system.

8. / The virtual microprocessor and its corresponding operating system of claim 1, in which said high level functional modules (133) are modules suitable for implementing functions of the group comprising:

managing a file system;

a database engine;

communicating with the outside;

a TCP/IP stack;

managing a printer;

reading an electronic book reader;

a hypertext module;

managing a graphics interface and a graphics module;

tools and a library of auxiliary functions;

an interface for making a call to a local system.

9. / The virtual microprocessor and its corresponding operating system of claim 1, in which the middleware means are means suitable for being implemented in supervisor mode of the operating system.