Method and apparatus for kTC noise canceling in a linear CMOS image sensor

• US 20030183745A1
• Filed: 03/27/2002
• Published: 10/02/2003
• Est. Priority Date: 03/27/2002
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Yang, Hongli, He, Xinping, Shan, Qingwei
• Granted Patent: US 6,982,403 B2
• Time in Patent Office: Days
• US Class Current: 250/208.1
• CPC Class Codes: H04N 25/63 applied to dark current

Abstract

A method of reading out a pixel signal from a pixel is disclosed. The method comprises first capturing a first black reference signal from the pixel prior to the pixel starting an integration period. Next, after completion of the integration period, a pixel signal is captured. Next, a second black reference signal is captured following completion of the integration period. Finally, the first black reference signal, second black reference signal, and pixel signal is output.

Claims

1. A method of reading out a pixel signal from a pixel comprising:

capturing a first black reference signal from said pixel prior to said pixel starting an integration period;

after completion of said integration period, capturing a pixel signal;

capturing a second black reference signal following completion of said integration period; and

outputting said first black reference signal, said second black reference signal, and said pixel signal.

2. The method of claim 1 wherein said first black reference signal is captured while said pixel is performing a reset function.

3. The method of claim 1 wherein said first black reference signal, said second black reference signal, and said pixel signal are output through a buffer.

4. The method of claim 1 wherein said first black reference signal is a previous second black reference signal from a previous readout cycle.

5. The method of claim 1 wherein said second black reference signal will be used as a subsequent first black reference signal for a subsequent readout cycle.

6. A column readout circuit for reading out a pixel signal output by a pixel, said circuit comprising:

a pixel signal branch connected to said pixel, said pixel signal branch including a pixel signal storage element, a pixel signal select switch, and a pixel signal read switch, said pixel signal select switch being connected to said pixel and said pixel signal storage element to selectively store said pixel signal onto said pixel signal storage element, said pixel signal read switch being connected to said pixel signal storage element to selectively read out said pixel signal from said pixel signal storage element;

a first black reference signal branch connected to said pixel, said first black reference signal branch including a first black reference storage element, a first black reference select switch, and a first black reference read switch, said first black reference select switch being connected to said pixel and said first black reference storage element to selectively store a first black reference signal onto said first black reference storage element, said first black reference read switch being connected to said first black reference storage element to selectively read out said first black reference signal from said first black reference storage element; and

a second black reference signal branch connected to said pixel, said second black reference signal branch including a second black reference storage element, a second black reference select switch, and a second black reference read switch, said second black reference select switch being connected to said pixel and said second black reference storage element to selectively store a second black reference signal onto said second black reference storage element, said second black reference read switch being connected to said second black reference storage element to selectively read out said second black reference signal from said second black reference storage element;

7. The circuit of claim 6 wherein said first black reference signal is stored onto said first black reference storage element prior to the start of a pixel signal integration period.

8. The circuit of claim 6 wherein said second black reference signal is stored onto said second black reference storage element after the completion of a pixel signal integration period.

9. The circuit of claim 6 wherein all of said storage elements are formed from capacitors.

10. The circuit of claim 6 further including a buffer connected to all of said read switches to allow the signals from the storage elements to be read out through said buffer.