Array substrate and method of inspecting the same

• US 20030184334A1
• Filed: 01/04/2001
• Published: 10/02/2003
• Est. Priority Date: 01/06/2000
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Matsunaga, Ikuo, Watanabe, Ryoichi, Seiki, Masahiro
• Granted Patent: US 6,873,174 B2
• Time in Patent Office: Days
• US Class Current: 324/765
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A first signal line and a second signal line are paired, and in one signal line selection period, CPU of the inspection circuit controls a write circuit and writes analog signals into the first signal line selected by means of a switch of the selection circuit. In the next signal line selection period, CPU controls a read circuit and reads output signals from the second signal line selected by means of the switch. CPU detects a short circuit between the paired signal lines based upon the output signals from the second signal line.

Claims

1. A method of inspecting an array substrate comprising a plurality of gate and signal lines disposed on the substrate with intersecting perpendicularly each other, a switching element disposed on each intersecting portion of the gate lines and the signal lines, a pixel capacitance electrically connected to each switching element, a plurality of input terminals into which signals outputted from an external drive circuit are inputted, and a selection means distributing signals inputted from each of said input terminals to at least one signal line of a signal line group including a plurality of signal lines sequentially,

the method of inspecting an array substrate comprising the steps of:

writing signals into one signal line in a first signal line selection period in which said one signal line is selected from the signal line group including a plurality of signal lines;

reading signals from another signal line in a second signal line selection period following said first signal line selection period in which said another signal line is selected from said signal line group; and

inspecting a short circuit between said one signal line and said another signal line based upon the read signals.

2. The method of inspecting an array substrate according to claim 1, wherein said one signal line and said another signal line are selected by means of the same selection means, and signals are written and read via one input terminal.

3. The method of inspecting an array substrate according to claim 1, wherein said one signal line and said another signal line are selected by means of different selection means, and signals are written and read via input terminals connected respectively to each selection means.

6. The method of inspecting an array substrate according to claim 1, wherein said drive circuit converts inputted digital signals into analog signals, and divides said signal lines into a plurality of signal line groups composed of a predetermined number of signal lines and outputs analog signals corresponding to each of said signal line groups serially, and

said selection means distributes serial analog signals from said drive circuit to a corresponding signal line of each of said signal line group sequentially.

7. The method of inspecting an array substrate according to claim 6, wherein said drive circuit is mounted on a flexible wiring substrate and is connected electrically to said array substrate.

8. The method of inspecting an array substrate according to claim 1, wherein said array substrate includes integrally a gate line drive means supplying drive signals to said gate line.

4. A method of inspecting an array substrate comprising a plurality of gate and signal lines disposed on the substrate with intersecting perpendicularly each other, a switching element disposed on each intersecting portion of the gate lines and the signal lines, a pixel capacitance connected electrically to each switching element, a plurality of input terminals into which signals outputted from an external drive circuit are inputted, a selection means distributing signals inputted from each of said input terminals to at least one signal line of a signal line group including a plurality of signal lines sequentially, and a distribution means putting continuity between one signal line and another signal line of said signal line group into ON/OFF,

the method of inspecting an array substrate comprising the steps of:

establishing continuity between said one signal line and said another signal line;

writing signals into said one signal line in a first signal line selection period in which said one signal line is selected from said signal line group including a plurality of signal lines;

reading signals from said another signal line in a timing following said first signal line selection period in a second signal line selection period in which said another signal line is selected from said signal line group; and

inspecting breaking of said one signal line and said another signal line based upon the read signals.

5. The method of inspecting an array substrate according to claim 4, wherein said one signal line and said another signal line are controlled by means of the same distribution means in being put into ON/OFF and are also selected by means of the same selection means, and signals are written and read via one input terminal.

9. The method of inspecting an array substrate according to claim 4, wherein said drive circuit converts inputted digital signals into analog signals, and divides said signal lines into a plurality of signal line groups composed of a predetermined number of signal lines and outputs analog signals corresponding to each of said signal line groups serially, and

said selection means distributes serial analog signals from said drive circuit to a corresponding signal line of each of said signal line group sequentially.

10. The method of inspecting an array substrate according to claim 9, wherein said drive circuit is mounted on a flexible wiring substrate and is connected electrically to said array substrate.

11. The method of inspecting an array substrate according to claim 4, wherein said array substrate includes integrally a gate line drive means supplying drive signals to said gate line.

12. An array substrate comprising:

a plurality of gate and signal lines disposed on the substrate with intersecting perpendicularly each other;

a switching element disposed on each intersecting portion of the gate lines and the signal lines;

a pixel capacitance connected electrically to each switching element;

a plurality of input terminals into which signals outputted from an external drive circuit are inputted;

a selection means distributing signals inputted from said input terminals to a plurality of adjacent signal lines sequentially; and

an inspection pad disposed between said selection means and said switching element and connected electrically to said signal lines.

13. The array substrate according to claim 12, wherein if the number of said signal lines selected by means one of said selection means is assumed to N, the number of said inspection pad is (N−

1).

14. The array substrate according to claim 12, wherein said selection means divides said signal lines into a plurality of signal line groups composed of a predetermined number of signal lines, inputs signals corresponding to each of said signal line groups, and distributes said signals to a corresponding signal line of each of said signal line group sequentially.

15. The array substrate according to claim 12, wherein said array substrate includes integrally a gate line drive means supplying drive signals to said gate line.

16. A method of inspecting an array substrate comprising:

a plurality of gate and signal lines disposed on the substrate with intersecting perpendicularly each other;

a switching element disposed on each intersecting portion of the gate lines and the signal lines;

a pixel capacitance connected electrically to the switching elements;

a plurality of input terminals into which signals outputted from an external drive circuit are inputted;

a selection means distributing signals inputted from said input terminals to at least one signal line of a signal line group including a plurality of signal lines sequentially; and

an inspection pad disposed between said selection means and said switching element and connected electrically to said signal line,

the method of inspecting an array substrate comprising the steps of;

selecting a first signal line by means of said selection means;

writing signals from said input terminals into said first signal line;

reading output signals outputted from said second signal line via said inspection pad; and

inspecting a short circuit between said first signal line and said second signal line based upon the signals read from the inspection pad.