Low threshold microcavity light emitter

• US 20030189963A1
• Filed: 04/09/2002
• Published: 10/09/2003
• Est. Priority Date: 11/12/1996
• Status: Abandoned Application

• Current Assignee: Dennis G. Deppe, Diana L. Huffaker
• Original Assignee: Dennis G. Deppe, Diana L. Huffaker
• Inventors: Huffaker, Diana L., Deppe, Dennis G.
• Application Number:
  US10/119,378
• Publication Number:
  US 20030189963A1
• Time in Patent Office: Days
• US Class Current: 372/96
• CPC Class Codes: H01S 2301/166 Single transverse or lateral mode
• CPC Class Codes: H01S 5/18311 using selective oxidation
• CPC Class Codes: H01S 5/18316 Airgap confined
• CPC Class Codes: H01S 5/1833 with more than one structure
• CPC Class Codes: H01S 5/18358 containing spacer layers to adjust the phase of the light wave in the cavity
• CPC Class Codes: H01S 5/2068 obtained by radiation treatment or annealing

Abstract

Disclosed is a low threshold vertical cavity surface emitter having a low refraction index confining layer directly in the cavity spacer. This allows a ½ wavelength cavity spacer and a lateral size of as low as 2 μm. Also disclosed is a method of rapid temperature annealing to seal a III-V crystal and inhibit oxidative degradation.

Claims

1. A vertical cavity surface emitter comprising a cavity spacer, wherein said cavity spacer contains a low refraction index confining layer.

2. The vertical cavity surface emitter of claim 1, wherein said cavity spacer has a vertical dimension of ½

emission wavelength.

3. The vertical cavity surface emitter of claim 1, wherein said cavity spacer has a vertical dimension of one full emission wavelength.

4. The vertical cavity surface emitter of claim 1, wherein the spacer cavity has a lateral dimension of less than 10 microns.

5. The vertical cavity surface emitter of claim 1, wherein the spacer cavity has a lateral dimension of less than 8 microns.

6. The vertical cavity surface emitter of claim 1, wherein the spacer cavity has a lateral dimension of about 2 microns.

7. The vertical cavity surface emitter of claim 1, wherein said low refraction index confining layer is a native aluminum oxide layer.

8. The vertical cavity surface emitter of claim 7, wherein said native aluminum oxide is prepared by selective conversion of AlAs or AlGaAs.

9. The vertical cavity surface emitter of claim 1, wherein said low refraction index confining layer is an etched void.

10. The vertical cavity surface emitter of claim 9, wherein said etched void is sealed by a rapid temperature anneal in a dry inert gas containing dry oxygen.

11. The vertical cavity surface emitter of claim 10, wherein said rapid temperature anneal is performed at a temperature of from about 400 to about 1,000°

C.

12. The vertical cavity surface emitter of claim 10, wherein said rapid temperature anneal is performed at a temperature of from about 500 to about 600°

C.

13. The vertical cavity surface emitter of claim 10, wherein said rapid temperature anneal is performed at a temperature of from about 525 to about 550°

C.

14. The vertical cavity surface emitter of claim 10, wherein said rapid temperature anneal is performed for a period of from about 5 seconds to about 10 minutes.

15. The vertical cavity surface emitter of claim 10, wherein said rapid temperature anneal is performed for a period of from about 5 seconds to about 1 minute.

16. The vertical cavity surface emitter of claim 10, wherein said rapid temperature anneal is performed for a period of from about 15 seconds to about 45 seconds.

17. The vertical cavity surface emitter of claim 1, wherein said low refraction index confining layer is in the upper half of said cavity.

18. The vertical cavity surface emitter of claim 1, wherein said low refraction index confining layer is in the lower half of said cavity.

19. A semiconductor device having an exposed AlAs or AlGaAs surface sealed against oxidation by a rapid thermal anneal in a dry inert gas containing dry oxygen.

20. The semiconductor device of claim 19, wherein said rapid temperature anneal is performed at a temperature of from about 400 to about 1,000°

C.

21. The semiconductor device of claim 19, wherein said rapid temperature anneal is performed at a temperature of from about 500 to about 600°

C.

22. The semiconductor device of claim 19, wherein said rapid temperature anneal is performed at a temperature of from about 525 to about 550°

C.

23. The semiconductor device of claim 19, wherein said rapid temperature anneal is performed for a period of from about 5 seconds to about 10 minutes.

24. The semiconductor device of claim 19, wherein said rapid temperature anneal is performed for a period of from about 5 seconds to about 1 minute.

25. The semiconductor device of claim 19, wherein said rapid temperature anneal is performed for a period of from about 15 seconds to about 45 seconds.

26. A method of sealing an AlAs layer against oxidative decomposition comprising contacting said layer with a dense surface oxide formed by annealing in a dry inert gas ambient containing dry oxygen at a temperature of from about 400 to about 1000°

C. for a time sufficient to seal said AlAs layer.

27. The method of claim 26, wherein said time is from about 5 seconds to about 5 minutes.

28. The method of claim 26, wherein said dry inert gas is nitrogen, a combination of nitrogen and hydrogen, argon or a combination of argon and hydrogen.

29. The method of claim 27, wherein said hydrogen is present at about 10% v/v.

30. A vertical cavity surface emitter comprising:

a first distributed Bragg reflector composed of layers of n-type AlAs and n-type GaAs and forming the bottom of said vertical cavity surface emitter;

a second distributed Bragg reflector composed of layers of p-type GaAs and forming the top of said vertical cavity surface emitter;

a spacer cavity of one-half wavelength vertical dimension disposed between said first distributed Bragg reflector and said second distributed Bragg reflector;

and wherein a low refractive index layer is disposed within said spacer cavity.

31. The vertical cavity surface emitter of claim 30, wherein said low refractive index layer is an Al_xO_y layer.

32. The vertical cavity surface emitter of claim 31, wherein said Al_xO_y layer is a formed by selective conversion of AlAs or AlGaAs.

33. The vertical cavity surface emitter of claim 30, wherein said low refractive index layer is an etched void.

34. The vertical cavity surface emitter of claim 33, wherein said etched void is sealed by a rapid thermal anneal.

35. A vertical cavity surface emitting laser comprising a cavity spacer, a quantum well emitting region and a low refractive index layer, wherein said cavity spacer is a high refractive index layer of ½

wavelength thickness, said a quantum well emitting region is at the upper or lower boundary of said cavity spacer and said low refractive index layer is formed adjacent the cavity spacer to serve as lateral index confinement.

36. The vertical cavity surface emitting laser of claim 35, wherein said low refractive index layer is Al_xO_y.

37. The vertical cavity surface emitting laser of claim 35, wherein said low refractive index layer is an etched void.

38. A vertical cavity surface emitting laser comprising a cavity spacer, a quantum well emitting region and a low refractive index layer, wherein said cavity spacer is a high refractive index layer of one wavelength thickness, said a quantum well emitting region is at the upper or lower boundary of said cavity spacer and said low refractive index layer is formed adjacent the cavity spacer to serve as lateral index confinement.

39. The vertical cavity surface emitting laser of claim 38, wherein said low refractive index layer is Al_xO_y.

40. The vertical cavity surface emitting laser of claim 38, wherein said low refractive index layer is an etched void.