Line termination incorporating compensation for device and package parasitics

• US 20030190849A1
• Filed: 03/10/2003
• Published: 10/09/2003
• Est. Priority Date: 04/05/2002
• Status: Abandoned Application

• Current Assignee: Top Box Assets LLC (Intellectual Ventures LLC)
• Original Assignee: Top Box Assets LLC (Intellectual Ventures LLC)
• Inventors: Deas, Alexander Roger, Abrosimov, Igor Anatolievich
• Application Number:
  US10/383,727
• Publication Number:
  US 20030190849A1
• Time in Patent Office: Days
• US Class Current: 439/894
• CPC Class Codes: H04L 25/0278 Arrangements for impedance matching

Abstract

A distributed terminator for terminating a transmission line linking a plurality of integrated circuits. The terminator comprises a plurality of resistors and a capacitor that is usually an ESD structure. The values of the resistors are such that the reflection co-efficient of the combined termination is lower across the bandwidth of the signal being transmitted than a reflection coefficient with a termination using resistors in the same topology where the effective value of the resistors is equal to the line impedance.

Claims

1. A distributed terminator for terminating a transmission line having its end linked to an integrated circuit, the terminator comprising a parallel-connected resistor means connected in parallel to said integrated circuit and a series resistor means connected in series to the transmission line and said integrated circuit.

2. A distributed terminator according to claim 1 $wherein the overall resistance value of said parallel-connected resistor means and series resistor means differs from the transmission line impedance by 20% or less.

3. A distributed terminator according to claim 1, wherein the transmission line is linked to the integrated circuit via a driver incorporated therein, while the resistance value of said parallel-connected resistor means is 5-95% less than the impedance of the transmission line, depending on the capacitance of said driver.

4. A distributed terminator according to claim 1 wherein the transmission line is linked to the integrated circuit via a receiver incorporated therein, while the resistance value of said parallel-connected resistor means is 5-95% less than the impedance of the transmission line, depending on the capacitance of said receiver.

5. A distributed terminator according to claim 1, wherein the integrated circuit has a package connected thereto,.

6. A distributed terminator according to claim 1, wherein the and the series resistor means is arranged outside the package.

7. A distributed terminator according to claim 1, wherein the series resistor means forms a part of the package

8. A distributed terminator according to claim 5, wherein the parallel-connected resistor means is arranged within the integrated circuit.

9. A distributed terminator according to claim 5, wherein the parallel-connected resistor means is arranged within the integrated circuit package.

10. A distributed terminator according to claim 1, wherein the parallel-connected resistor means includes a plurality of resistors connected in parallel to said integrated circuit.

11. A distributed terminator according to claim 1, wherein the series resistor means includes a plurality of resistors connected in series to the transmission line and said integrated circuit.

12. A distributed terminator according to claim 11, wherein said plurality of resistors connected in series include package components as resistors.

13. A terminator according to claim 1, wherein the parallel-connected resistor means is connected to a terminating voltage within the integrated circuit.

14. A terminator according to claim 10, further including an inductor connected in series at least to one resistor of the parallel-connected resistor means.

15. A terminator according to claim 5, wherein the resistance value of said parallel-connected resistor means is determined with consideration for the capacitance of the package.

18. A data communication system comprising a first integrated circuit, a second integrated circuit and a transmission line linking the first integrated circuit to the second integrated circuit, wherein the transmission line is terminated by a distributed termination according to claim 1.

16. A data communication apparatus comprising a transmission line connected to an integrated circuit via a driver incorporated therein, where the transmission line is terminated by a terminator comprising a parallel-connected resistor means connected in parallel to said driver and a series resistor means connected in series to the transmission line and said driver.

17. A data communication apparatus comprising a transmission line connected to an integrated circuit via a receiver incorporated therein, where the transmission line is terminated by a terminator comprising a parallel-connected resistor means connected in parallel to said receiver and a series resistor means connected in series to the transmission line and said receiver.

19. A method of terminating a transmission line having its end connected to an integrated circuit, the method including the following steps:

determining the impedance of the transmission line;

determining the capacitance of ESD structure of said transmission line connection;

selecting desired frequency interval;

calculating the value of a parallel-connected resistor means and a series resistor means as a function of the impedance of the transmission line, capacitance of said ESD structure, and the selected frequency interval;

providing parallel-connected resistor means and series resistor means having the calculated values; and

connecting the parallel-connected resistor means in parallel to said integrated circuit, and connecting the series resistor means in series to the transmission line and said integrated circuit.