Method and system for reconfigurable channel coding

• US 20030190910A1
• Filed: 03/28/2003
• Published: 10/09/2003
• Est. Priority Date: 05/08/2001
• Status: Active Grant

• Current Assignee: Cornami, Inc.
• Original Assignee: QST Holdings LLC
• Inventors: Scheuermann, W. James
• Granted Patent: US 7,822,109 B2
• Time in Patent Office: Days
• US Class Current: 455/418
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04L 1/0043 Realisations of complexity reduction techniques, e.g. use of look-up tables
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0059 Convolutional codes
• CPC Class Codes: H04L 65/75 Media network packet handling
• CPC Class Codes: H04L 65/756 adapting media to device capabilities

Abstract

Aspects of a reconfigurable system for providing channel coding in a wireless communication device are described. The aspects include a plurality of computation elements for performing channel coding operations and memory for storing programs to direct each of the plurality of computation elements. A controller controls the plurality of computation elements and stored programs to achieve channel coding operations in accordance with a plurality of wireless communication standards. The plurality of computation elements include a data reordering element, a linear feedback shift register (LFSR) element, a convolutional encoder element, and a Viterbi decoder element.

Claims

1. A reconfigurable system for providing channel coding in a wireless communication device comprising:

a plurality of computation elements for performing channel coding operations;

memory for storing programs to direct each of the plurality of computation elements;

and

a controller for controlling the plurality of computation elements and stored programs to achieve channel coding operations in accordance with a plurality of wireless communication standards.

2. The reconfigurable system of claim 1 further comprising a host controller for reconfiguring the channel coding by providing programs that update the stored programs to accommodate a change in the wireless standard.

3. The reconfigurable system of claim 1 wherein each of the plurality of computation elements further comprises a finite state machine.

4. The reconfigurable system of claim 1 wherein the plurality of computation elements further comprises a data reordering element.

5. The reconfigurable system of claim 4 wherein the data reordering element further comprises a coupled configuration of a counter, a look-up table, a data input source, a multiplexer, a stager, and a data output source.

6. The reconfigurable system of claim 4 wherein the plurality of computation elements further comprises a linear feedback shift register (LFSR) element.

7. The reconfigurable system of claim 6 wherein the LFSR element further comprises a coupled configuration of a register, a shifter, a multiplexer, a exclusive-OR logic means, and an accumulator.

8. The reconfigurable system of claim 7 wherein the LFSR element operates in a byte-oriented manner.

9. The reconfigurable system of claim 6 wherein the plurality of computation elements further comprises a convolutional encoder element.

10. The reconfigurable system of claim 9 wherein the convolutional encoder further comprises a coupled configuration of an input shift register, a delay register, a plurality of polynomial generators, a rate selector means, a multiplexer, and an output shift register.

11. The reconfigurable system of claim 10 wherein each of the plurality of polynomial generators further comprises a configuration register, an AND logic means, and an exclusive-OR logic means.

12. The reconfigurable system of claim 11 wherein the convolutional encoder operates in a byte-oriented manner.

13. The reconfigurable system of claim 9 wherein the plurality of computation elements further comprises a Viterbi decoder element.

14. The reconfigurable system of claim 13 wherein the Viterbi decoder element further comprises a coupled configuration of a counter, a codeword and punctures look-up table, a register, recode logic, an address generator, path metrics memory, state registers, plus/minus adjusters, adders, a selector, and a comparator.

15. A method for achieving channel coding in a wireless communication device that adapts to changes in wireless communication standards, the method comprising:

providing a plurality of computation elements for performing channel coding operations;

providing memory for storing programs to direct each of the plurality of computation elements; and

providing a controller for controlling the plurality of computation elements and stored programs to achieve channel coding operations in accordance with a plurality of wireless communication standards.

16. The method of claim 15 further comprising providing a host controller for reconfiguring the channel coding by providing programs that update the stored programs to accommodate a change in the wireless standard.

17. The method of claim 15 wherein providing a plurality of computation elements further comprises providing each computation element with a finite state machine.

18. The method of claim 15 wherein providing a plurality of computation elements further comprises providing a data reordering element, a linear feedback shift register (LFSR) element, a convolutional encoder element, and a Viterbi decoder element.

19. A reconfigurable system for providing channel coding in a wireless communication device comprising:

a plurality of computation units for providing operations for a wireless communication device that adjust to changes in wireless communication standards, the plurality of computation units including a channel coder computation unit; and

a host controller for configuring the plurality of computation units based on which of the wireless communication standards is used in a particular environment.

20. The reconfigurable system of claim 19 wherein the channel coding computation unit further comprises:

a plurality of computation elements for performing channel coding operations;

memory for storing programs to direct each of the plurality of computation elements; and

a controller for controlling the plurality of computation elements and stored programs to achieve channel coding operations in accordance with the plurality of wireless communication standards.

21. The reconfigurable system of claim 19 wherein each of the plurality of computation elements further comprises a finite state machine.

22. The reconfigurable system of claim 19 wherein the plurality of computation elements further comprises a data reordering element, a linear feedback shift register (LFSR) element, a convolutional encoder element, and a Viterbi decoder element.