Method and device to use memory access request tags

• US 20030191920A1
• Filed: 03/20/2003
• Published: 10/09/2003
• Est. Priority Date: 11/03/1999
• Status: Active Grant

• Current Assignee: Paul A. Laberge
• Original Assignee: Paul A. Laberge
• Inventors: LaBerge, Paul A.
• Granted Patent: US 6,684,303 B2
• Time in Patent Office: Days
• US Class Current: 711/173
• CPC Class Codes: G06F 13/4239 with asynchronous protocol

Abstract

A computer system includes a system controller that has configuration storage to store information to indicate whether the system controller is to associate tag information with a memory access request, and to indicate whether debug information or device identification information is to be encoded in the tag information.

Claims

1. A system controller comprising:

a configuration storage to store configuration information,

the configuration storage comprising;

a first portion to indicate whether the system controller is to associate tag information with memory access requests; and

a second portion to indicate whether debug information or device identification information is to be encoded in the tag information.

2. The system controller of claim 1, wherein the configuration storage further comprises another portion to indicate a type of state information to encode during a debug operation.

3. The system controller of claim 1, wherein the configuration storage further comprises another portion to indicate one or more devices that are burst-oriented and one or more devices that are non-burst-oriented.

4. The system controller of claim 1, further comprising a unit to tag a received memory access request with tag information indicated by the configuration information in the configuration storage.

5. The system controller of claim 4, further comprising another unit to present the tagged memory access request to a bus external to the system controller.

6. A method for use in a system, comprising:

storing information in a configuration storage to indicate whether a system controller is to associate tag information with a memory access request; and

storing information in the configuration storage to indicate whether debug information or device identification information is to be encoded in the tag information.

7. The method of claim 6, further comprising storing information in the configuration storage to indicate a type of state information to encode during a debug operation.

8. The method of claim 7, wherein the state information indicates a memory access request queue length.

9. The method of claim 7, wherein the state information comprises ordering flags.

10. The method of claim 7, wherein the state information indicates a number of entries in an interface queue.

11. The method of claim 6, further comprising storing information in the configuration storage to indicate whether one or more devices are burst oriented or non-burst oriented.

12. The method of claim 6, further comprising:

receiving the memory access request;

tagging the received memory access request with tag information indicated by the configuration storage;

outputting the tagged memory access request to a bus external to the system controller.

13. A system controller comprising:

a configuration storage to store first information to indicate whether the system controller is to associate tag information with memory access requests, and second information to indicate a type of state information to encode in the tag information; and

a unit to tag a received memory access request based on the first and second information.

14. The system controller of claim 13, wherein the state information includes one or more of the following:

memory access request queue length, ordering flags, and number of entries in an interface queue.

15. The system controller of claim 14, wherein the unit is adapted to present the tagged memory access request on a bus external to the system controller.